2 * Copyright (c) 2007 MIPS Technologies, Inc.
3 * Copyright (c) 2001-2005 The Regents of The University of Michigan
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution;
13 * neither the name of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 * Authors: Korey Sewell
34 #include "config/the_isa.hh"
35 #include "cpu/inorder/inorder_trace.hh"
36 #include "cpu/inorder/pipeline_traits.hh"
37 #include "cpu/exetrace.hh"
38 #include "cpu/static_inst.hh"
39 #include "cpu/thread_context.hh"
40 #include "debug/ExecEnable.hh"
41 #include "params/InOrderTrace.hh"
44 using namespace TheISA
;
49 Trace::InOrderTraceRecord::dumpTicks(std::ostream
&outs
)
52 ccprintf(outs
, "%7d: ", when
);
55 for (int i
=0; i
< stageCycle
.size(); i
++) {
56 if (i
< stageCycle
.size() - 1)
57 outs
<< dec
<< stageCycle
[i
] << "-";
59 outs
<< dec
<< stageCycle
[i
] << ":";
65 InOrderTrace::getInstRecord(unsigned num_stages
, bool stage_tracing
,
68 if (!Debug::ExecEnable
)
74 return new InOrderTraceRecord(num_stages
, stage_tracing
, tc
, 0);
78 InOrderTrace::getInstRecord(Tick when
, ThreadContext
*tc
,
79 const StaticInstPtr staticInst
, TheISA::PCState _pc
,
80 const StaticInstPtr macroStaticInst
)
82 return new InOrderTraceRecord(ThePipeline::NumStages
, true, tc
, _pc
);
87 ////////////////////////////////////////////////////////////////////////
89 // ExeTracer Simulation Object
92 InOrderTraceParams::create()
94 return new Trace::InOrderTrace(this);