src/cpu/inorder/inorder_trace.cc

   1 /*
   2  * Copyright (c) 2007 MIPS Technologies, Inc.
   3  * Copyright (c) 2001-2005 The Regents of The University of Michigan
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions are
   8  * met: redistributions of source code must retain the above copyright
   9  * notice, this list of conditions and the following disclaimer;
  10  * redistributions in binary form must reproduce the above copyright
  11  * notice, this list of conditions and the following disclaimer in the
  12  * documentation and/or other materials provided with the distribution;
  13  * neither the name of the copyright holders nor the names of its
  14  * contributors may be used to endorse or promote products derived from
  15  * this software without specific prior written permission.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  18  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  19  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  20  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  21  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  22  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  23  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  24  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  25  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  26  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  27  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28  *
  29  * Authors: Korey Sewell
  30  */
  31
  32 #include <iomanip>
  33
  34 #include "config/the_isa.hh"
  35 #include "cpu/exetrace.hh"
  36 #include "cpu/inorder/inorder_trace.hh"
  37 #include "cpu/static_inst.hh"
  38 #include "cpu/inorder/pipeline_traits.hh"
  39 #include "cpu/thread_context.hh"
  40 #include "params/InOrderTrace.hh"
  41
  42 using namespace std;
  43 using namespace TheISA;
  44
  45 namespace Trace {
  46
  47 inline void
  48 Trace::InOrderTraceRecord::dumpTicks(std::ostream &outs)
  49 {
  50   if (!stageTrace) {
  51     ccprintf(outs, "%7d: ", when);
  52   } else {
  53     ccprintf(outs, "");
  54     for (int i=0; i < stageCycle.size(); i++) {
  55         if (i < stageCycle.size() - 1)
  56             outs << dec << stageCycle[i] << "-";
  57         else
  58             outs << dec << stageCycle[i] << ":";
  59     }
  60   }
  61 }
  62
  63 InOrderTraceRecord *
  64 InOrderTrace::getInstRecord(unsigned num_stages, bool stage_tracing,
  65         ThreadContext *tc)
  66 {
  67     if (!IsOn(ExecEnable))
  68         return NULL;
  69
  70     if (!Trace::enabled)
  71         return NULL;
  72
  73     return new InOrderTraceRecord(num_stages, stage_tracing, tc);
  74 }
  75
  76 InOrderTraceRecord *
  77 InOrderTrace::getInstRecord(Tick when, ThreadContext *tc,
  78         const StaticInstPtr staticInst, Addr pc,
  79         const StaticInstPtr macroStaticInst, MicroPC upc)
  80 {
  81     return new InOrderTraceRecord(ThePipeline::NumStages, true, tc);
  82 }
  83
  84 /* namespace Trace */ }
  85
  86 ////////////////////////////////////////////////////////////////////////
  87 //
  88 //  ExeTracer Simulation Object
  89 //
  90 Trace::InOrderTrace *
  91 InOrderTraceParams::create()
  92 {
  93     return new Trace::InOrderTrace(this);
  94 };
  95