O3: Track if the RAS has been pushed or not to pop the RAS if neccessary.
[gem5.git] / src / cpu / inorder / pipeline_traits.5stage.hh
1 /*
2 * Copyright (c) 2007 MIPS Technologies, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Korey Sewell
29 *
30 */
31
32 #ifndef __CPU_INORDER_PIPELINE_IMPL_HH__
33 #define __CPU_INORDER_PIPELINE_IMPL_HH__
34
35 #include <list>
36 #include <queue>
37 #include <vector>
38
39 #include "arch/isa_traits.hh"
40 #include "cpu/inorder/params.hh"
41
42 class InOrderDynInst;
43
44 /* This Namespace contains constants, typedefs, functions and
45 * objects specific to the Pipeline Implementation.
46 */
47 namespace ThePipeline {
48 // Pipeline Constants
49 const unsigned NumStages = 5;
50 const unsigned MaxThreads = 3;
51 const unsigned StageWidth = 1;
52 const unsigned BackEndStartStage = 2;
53
54 // Enumerated List of Resources The Pipeline Uses
55 enum ResourceList {
56 FetchSeq = 0,
57 ITLB,
58 ICache,
59 Decode,
60 BPred,
61 FetchBuff,
62 RegManager,
63 AGEN,
64 ExecUnit,
65 DTLB,
66 DCache,
67 Grad,
68 FetchBuff2
69 };
70
71 // Expand this as necessary for your inter stage buffer sizes
72 static const unsigned interStageBuffSize[] = {
73 StageWidth, /* Stage 0 - 1 */
74 StageWidth, /* Stage 1 - 2 */
75 StageWidth, /* Stage 2 - 3 */
76 StageWidth, /* Stage 3 - 4 */
77 StageWidth, /* Stage 4 - 5 */
78 StageWidth, /* Stage 5 - 6 */
79 StageWidth, /* Stage 6 - 7 */
80 StageWidth, /* Stage 7 - 8 */
81 StageWidth /* Stage 8 - 9 */
82 };
83
84 typedef InOrderCPUParams Params;
85 typedef RefCountingPtr<InOrderDynInst> DynInstPtr;
86
87 //////////////////////////
88 // RESOURCE SCHEDULING
89 //////////////////////////
90 struct ScheduleEntry {
91 ScheduleEntry(int stage_num, int _priority, int res_num, int _cmd = 0,
92 int _idx = 0) :
93 stageNum(stage_num), resNum(res_num), cmd(_cmd),
94 idx(_idx), priority(_priority)
95 { }
96 virtual ~ScheduleEntry(){}
97
98 // Stage number to perform this service.
99 int stageNum;
100
101 // Resource ID to access
102 int resNum;
103
104 // See specific resource for meaning
105 unsigned cmd;
106
107 // See specific resource for meaning
108 unsigned idx;
109
110 // Some Resources May Need Priority?
111 int priority;
112 };
113
114 struct entryCompare {
115 bool operator()(const ScheduleEntry* lhs, const ScheduleEntry* rhs) const
116 {
117 // Prioritize first by stage number that the resource is needed
118 if (lhs->stageNum > rhs->stageNum) {
119 return true;
120 } else if (lhs->stageNum == rhs->stageNum) {
121 /*if (lhs->resNum > rhs->resNum) {
122 return true;
123 } else {
124 return false;
125 }*/
126
127 if (lhs->priority > rhs->priority) {
128 return true;
129 } else {
130 return false;
131 }
132 } else {
133 return false;
134 }
135 }
136 };
137
138
139 typedef std::priority_queue<ScheduleEntry*, std::vector<ScheduleEntry*>,
140 entryCompare> ResSchedule;
141
142 void createFrontEndSchedule(DynInstPtr &inst);
143 bool createBackEndSchedule(DynInstPtr &inst);
144 int getNextPriority(DynInstPtr &inst, int stage_num);
145 };
146 #endif