src/cpu/inorder/pipeline_traits.9stage.smt2.hh

   1 /*
   2  * Copyright (c) 2007 MIPS Technologies, Inc.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Korey Sewell
  29  *
  30  */
  31
  32 #ifndef __CPU_INORDER_PIPELINE_IMPL_HH__
  33 #define __CPU_INORDER_PIPELINE_IMPL_HH__
  34
  35 #include <list>
  36 #include <queue>
  37 #include <vector>
  38 #include <map>
  39
  40 #include "arch/isa_traits.hh"
  41 #include "cpu/inorder/params.hh"
  42
  43
  44 class InOrderDynInst;
  45
  46 /* This Namespace contains constants, typedefs, functions and
  47  * objects specific to the Pipeline Implementation.
  48  */
  49 namespace ThePipeline {
  50     // Pipeline Constants
  51     const unsigned NumStages = 9;
  52     const unsigned MaxThreads = 2;
  53     const unsigned StageWidth = 1;
  54     const unsigned BackEndStartStage = 3;
  55
  56     // Use this to over-ride default stage widths
  57     static std::map<unsigned, unsigned> stageBufferSizes;
  58
  59     //static unsigned interStageBuffSize[NumStages];
  60
  61     static const unsigned interStageBuffSize[NumStages] = {
  62         StageWidth, /* Stage 0 - 1 */
  63         StageWidth, /* Stage 1 - 2 */
  64         MaxThreads * 4,          /* Stage 2 - 3 */
  65         StageWidth, /* Stage 3 - 4 */
  66         MaxThreads * 4, /* Stage 4 - 5 */
  67         StageWidth, /* Stage 5 - 6 */
  68         StageWidth, /* Stage 6 - 7 */
  69         StageWidth, /* Stage 7 - 8 */
  70         MaxThreads  /* Stage 8 - 9 */
  71     };
  72
  73
  74     // Enumerated List of Resources The Pipeline Uses
  75     enum ResourceList {
  76        FetchSeq = 0,
  77        ITLB,
  78        ICache,
  79        Decode,
  80        BPred,
  81        RegManager,
  82        AGEN,
  83        ExecUnit,
  84        DTLB,
  85        DCache,
  86        Grad,
  87        FetchBuff,
  88        FetchBuff2
  89     };
  90
  91     typedef InOrderCPUParams Params;
  92     typedef RefCountingPtr<InOrderDynInst> DynInstPtr;
  93
  94 //void initPipelineTraits();
  95
  96     //////////////////////////
  97     // RESOURCE SCHEDULING
  98     //////////////////////////
  99     struct ScheduleEntry {
 100         ScheduleEntry(int stage_num, int _priority, int res_num, int _cmd = 0,
 101                       int _idx = 0) :
 102             stageNum(stage_num), resNum(res_num), cmd(_cmd),
 103             idx(_idx), priority(_priority)
 104         { }
 105         virtual ~ScheduleEntry(){}
 106
 107         // Stage number to perform this service.
 108         int stageNum;
 109
 110         // Resource ID to access
 111         int resNum;
 112
 113         // See specific resource for meaning
 114         unsigned cmd;
 115
 116         // See specific resource for meaning
 117         unsigned idx;
 118
 119         // Some Resources May Need Priority?
 120         int priority;
 121     };
 122
 123     struct entryCompare {
 124         bool operator()(const ScheduleEntry* lhs, const ScheduleEntry* rhs) const
 125         {
 126             // Prioritize first by stage number that the resource is needed
 127             if (lhs->stageNum > rhs->stageNum) {
 128                 return true;
 129             } else if (lhs->stageNum == rhs->stageNum) {
 130                 /*if (lhs->resNum > rhs->resNum) {
 131                   return true;
 132                 } else {
 133                   return false;
 134                   }*/
 135
 136                 if (lhs->priority > rhs->priority) {
 137                   return true;
 138                 } else {
 139                   return false;
 140                 }
 141             } else {
 142                 return false;
 143             }
 144         }
 145     };
 146
 147
 148     typedef std::priority_queue<ScheduleEntry*, std::vector<ScheduleEntry*>,
 149                                          entryCompare> ResSchedule;
 150
 151     void createFrontEndSchedule(DynInstPtr &inst);
 152     bool createBackEndSchedule(DynInstPtr &inst);
 153     int getNextPriority(DynInstPtr &inst, int stage_num);
 154 };
 155 #endif