src/cpu/inorder/pipeline_traits.hh

   1 /*
   2  * Copyright (c) 2007 MIPS Technologies, Inc.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Korey Sewell
  29  *
  30  */
  31
  32 #ifndef __CPU_INORDER_PIPELINE_IMPL_HH__
  33 #define __CPU_INORDER_PIPELINE_IMPL_HH__
  34
  35 #include <list>
  36 #include <queue>
  37 #include <vector>
  38
  39 #include "arch/isa_traits.hh"
  40 #include "cpu/base.hh"
  41
  42 #include "params/InOrderCPU.hh"
  43
  44 class InOrderDynInst;
  45
  46 /* This Namespace contains constants, typedefs, functions and
  47  * objects specific to the Pipeline Implementation.
  48  */
  49 namespace ThePipeline {
  50     // Pipeline Constants
  51     const unsigned NumStages = 5;
  52     const ThreadID MaxThreads = 8;
  53     const unsigned StageWidth = 1;
  54     const unsigned BackEndStartStage = 2;
  55
  56     // Enumerated List of Resources The Pipeline Uses
  57     enum ResourceList {
  58        FetchSeq = 0,
  59        ICache,
  60        Decode,
  61        BPred,
  62        FetchBuff,
  63        RegManager,
  64        AGEN,
  65        ExecUnit,
  66        MDU,
  67        DCache,
  68        Grad,
  69        FetchBuff2
  70     };
  71
  72     // Expand this as necessary for your inter stage buffer sizes
  73     static const unsigned interStageBuffSize[] = {
  74         StageWidth, /* Stage 0 - 1 */
  75         StageWidth, /* Stage 1 - 2 */
  76         StageWidth, /* Stage 2 - 3 */
  77         StageWidth, /* Stage 3 - 4 */
  78         StageWidth, /* Stage 4 - 5 */
  79         StageWidth, /* Stage 5 - 6 */
  80         StageWidth, /* Stage 6 - 7 */
  81         StageWidth, /* Stage 7 - 8 */
  82         StageWidth  /* Stage 8 - 9 */
  83     };
  84
  85     typedef InOrderCPUParams Params;
  86     typedef RefCountingPtr<InOrderDynInst> DynInstPtr;
  87
  88     //////////////////////////
  89     // RESOURCE SCHEDULING
  90     //////////////////////////
  91     struct ScheduleEntry {
  92         ScheduleEntry(int stage_num, int _priority, int res_num, int _cmd = 0,
  93                       int _idx = 0) :
  94             stageNum(stage_num), resNum(res_num), cmd(_cmd),
  95             idx(_idx), priority(_priority)
  96         { }
  97         virtual ~ScheduleEntry(){}
  98
  99         // Stage number to perform this service.
 100         int stageNum;
 101
 102         // Resource ID to access
 103         int resNum;
 104
 105         // See specific resource for meaning
 106         unsigned cmd;
 107
 108         // See specific resource for meaning
 109         unsigned idx;
 110
 111         // Some Resources May Need Priority?
 112         int priority;
 113     };
 114
 115     struct entryCompare {
 116         bool operator()(const ScheduleEntry* lhs, const ScheduleEntry* rhs)
 117             const
 118         {
 119             // Prioritize first by stage number that the resource is needed
 120             if (lhs->stageNum > rhs->stageNum) {
 121                 return true;
 122             } else if (lhs->stageNum == rhs->stageNum) {
 123                 if (lhs->priority > rhs->priority) {
 124                   return true;
 125                 } else {
 126                   return false;
 127                 }
 128             } else {
 129                 return false;
 130             }
 131         }
 132     };
 133
 134
 135     typedef std::priority_queue<ScheduleEntry*, std::vector<ScheduleEntry*>,
 136                                          entryCompare> ResSchedule;
 137
 138     void createFrontEndSchedule(DynInstPtr &inst);
 139     bool createBackEndSchedule(DynInstPtr &inst);
 140     int getNextPriority(DynInstPtr &inst, int stage_num);
 141
 142     class InstStage {
 143       private:
 144         int nextTaskPriority;
 145         int stageNum;
 146         ResSchedule *instSched;
 147
 148       public:
 149         InstStage(DynInstPtr inst, int stage_num);
 150
 151         void needs(int unit, int request) {
 152             instSched->push( new ScheduleEntry(
 153                 stageNum, nextTaskPriority++, unit, request
 154             ));
 155         }
 156
 157         void needs(int unit, int request, int param) {
 158             instSched->push( new ScheduleEntry(
 159                 stageNum, nextTaskPriority++, unit, request, param
 160             ));
 161         }
 162
 163     };
 164 };
 165
 166
 167
 168
 169 #endif