2 * Copyright (c) 2007 MIPS Technologies, Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 * Authors: Korey Sewell
32 #ifndef __CPU_INORDER_PIPELINE_IMPL_HH__
33 #define __CPU_INORDER_PIPELINE_IMPL_HH__
39 #include "arch/isa_traits.hh"
40 #include "cpu/base.hh"
42 #include "params/InOrderCPU.hh"
46 /* This Namespace contains constants, typedefs, functions and
47 * objects specific to the Pipeline Implementation.
49 namespace ThePipeline {
51 const unsigned NumStages = 5;
52 const unsigned MaxThreads = 8;
53 const unsigned StageWidth = 1;
54 const unsigned BackEndStartStage = 2;
56 // Enumerated List of Resources The Pipeline Uses
74 // Expand this as necessary for your inter stage buffer sizes
75 static const unsigned interStageBuffSize[] = {
76 StageWidth, /* Stage 0 - 1 */
77 StageWidth, /* Stage 1 - 2 */
78 StageWidth, /* Stage 2 - 3 */
79 StageWidth, /* Stage 3 - 4 */
80 StageWidth, /* Stage 4 - 5 */
81 StageWidth, /* Stage 5 - 6 */
82 StageWidth, /* Stage 6 - 7 */
83 StageWidth, /* Stage 7 - 8 */
84 StageWidth /* Stage 8 - 9 */
87 typedef InOrderCPUParams Params;
88 typedef RefCountingPtr<InOrderDynInst> DynInstPtr;
90 //////////////////////////
91 // RESOURCE SCHEDULING
92 //////////////////////////
93 struct ScheduleEntry {
94 ScheduleEntry(int stage_num, int _priority, int res_num, int _cmd = 0,
96 stageNum(stage_num), resNum(res_num), cmd(_cmd),
97 idx(_idx), priority(_priority)
99 virtual ~ScheduleEntry(){}
101 // Stage number to perform this service.
104 // Resource ID to access
107 // See specific resource for meaning
110 // See specific resource for meaning
113 // Some Resources May Need Priority?
117 struct entryCompare {
118 bool operator()(const ScheduleEntry* lhs, const ScheduleEntry* rhs) const
120 // Prioritize first by stage number that the resource is needed
121 if (lhs->stageNum > rhs->stageNum) {
123 } else if (lhs->stageNum == rhs->stageNum) {
124 if (lhs->priority > rhs->priority) {
136 typedef std::priority_queue<ScheduleEntry*, std::vector<ScheduleEntry*>,
137 entryCompare> ResSchedule;
139 void createFrontEndSchedule(DynInstPtr &inst);
140 bool createBackEndSchedule(DynInstPtr &inst);
141 int getNextPriority(DynInstPtr &inst, int stage_num);
145 int nextTaskPriority;
147 ResSchedule *instSched;
150 InstStage(DynInstPtr inst, int stage_num);
152 void needs(int unit, int request) {
153 instSched->push( new ScheduleEntry(
154 stageNum, nextTaskPriority++, unit, request
158 void needs(int unit, int request, int param) {
159 instSched->push( new ScheduleEntry(
160 stageNum, nextTaskPriority++, unit, request, param