src/cpu/inorder/reg_dep_map.hh

   1 /*
   2  * Copyright (c) 2007 MIPS Technologies, Inc.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Korey Sewell
  29  *
  30  */
  31
  32 #ifndef CPU_INORDER_REG_DEP_MAP_HH
  33 #define CPU_INORDER_REG_DEP_MAP_HH
  34
  35 #include <list>
  36 #include <vector>
  37
  38 #include "arch/isa_traits.hh"
  39 #include "cpu/inorder/pipeline_traits.hh"
  40
  41 class InOrderCPU;
  42
  43 class RegDepMap
  44 {
  45     typedef ThePipeline::DynInstPtr DynInstPtr;
  46
  47   public:
  48     RegDepMap(int size = TheISA::TotalNumRegs);
  49
  50     ~RegDepMap() { }
  51
  52     std::string name();
  53
  54     void setCPU(InOrderCPU *_cpu);
  55
  56     /** Clear the Entire Map */
  57     void clear();
  58
  59     /** Insert all of a instruction's destination registers into map*/
  60     void insert(DynInstPtr inst);
  61
  62     /** Insert an instruction into a specific destination register index onto map */
  63     void insert(unsigned idx, DynInstPtr inst);
  64
  65     /** Remove all of a instruction's destination registers into map*/
  66     void remove(DynInstPtr inst);
  67
  68     /** Remove a specific instruction and destination register index from map */
  69     void remove(unsigned idx, DynInstPtr inst);
  70
  71     /** Remove Front instruction from a destination register */
  72     void removeFront(unsigned idx, DynInstPtr inst);
  73
  74     /** Is the current instruction able to read from this destination register? */
  75     bool canRead(unsigned idx, DynInstPtr inst);
  76
  77     /** Is the current instruction able to get a forwarded value from another instruction
  78      *  for this destination register? */
  79     DynInstPtr canForward(unsigned reg_idx, unsigned src_idx, DynInstPtr inst);
  80
  81     /** find an instruction to forward/bypass a value from */
  82     DynInstPtr findBypassInst(unsigned idx);
  83
  84     /** Is the current instruction able to write to this destination register? */
  85     bool canWrite(unsigned idx, DynInstPtr inst);
  86
  87     /** Size of Dependency of Map */
  88     int depSize(unsigned idx);
  89
  90   protected:
  91     // Eventually make this a map of lists for
  92     // efficiency sake!
  93     std::vector<std::list<DynInstPtr> > regMap;
  94
  95     InOrderCPU *cpu;
  96 };
  97
  98 #endif
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