2 * Copyright (c) 2007 MIPS Technologies, Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 * Authors: Korey Sewell
32 #ifndef __CPU_INORDER_RESOURCE_HH__
33 #define __CPU_INORDER_RESOURCE_HH__
39 #include "base/types.hh"
40 #include "cpu/inorder/inorder_dyn_inst.hh"
41 #include "cpu/inorder/pipeline_traits.hh"
42 #include "cpu/inst_seq.hh"
43 #include "sim/eventq.hh"
44 #include "sim/sim_object.hh"
49 class ResourceRequest;
51 typedef ResourceRequest ResReq;
52 typedef ResourceRequest* ResReqPtr;
55 typedef CacheRequest* CacheReqPtr;
59 typedef ThePipeline::DynInstPtr DynInstPtr;
61 friend class ResourceEvent;
62 friend class ResourceRequest;
65 Resource(std::string res_name, int res_id, int res_width,
66 int res_latency, InOrderCPU *_cpu);
70 /** Return name of this resource */
71 virtual std::string name();
73 /** Return ID for this resource */
74 int getId() { return id; }
76 /** Any extra initiliazation stuff can be set up using this function that
77 * should get called before the simulation starts (tick 0)
80 virtual void initSlots();
82 /** Register Stats for this resource */
83 virtual void regStats() { }
85 /** Resources that care about thread activation override this. */
86 virtual void activateThread(ThreadID tid) { }
88 /** Deactivate Thread. Default action is to squash all instructions
89 * from deactivated thread.
91 virtual void deactivateThread(ThreadID tid);
93 /** Resources that care about thread activation override this. */
94 virtual void suspendThread(ThreadID tid) { }
96 /** Will be called the cycle before a context switch. Any bookkeeping
97 * that needs to be kept for that, can be done here
99 virtual void updateAfterContextSwitch(DynInstPtr inst, ThreadID tid) { }
101 /** Resources that care when an instruction has been graduated
104 virtual void instGraduated(InstSeqNum seq_num, ThreadID tid) { }
106 /** Post-processsing for Trap Generated from this instruction */
107 virtual void trap(Fault fault, ThreadID tid, DynInstPtr inst) { }
109 /** Request usage of this resource. Returns a ResourceRequest object
110 * with all the necessary resource information
112 virtual ResourceRequest* request(DynInstPtr inst);
114 /** Get the next available slot in this resource. Instruction is passed
115 * so that resources can check the instruction before allocating a slot
118 virtual int getSlot(DynInstPtr inst);
120 /** Find the slot that this instruction is using in a resource */
121 virtual int findSlot(DynInstPtr inst);
123 /** Free a resource slot */
124 virtual void freeSlot(int slot_idx);
126 /** Request usage of a resource for this instruction. If this instruction
127 * already has made this request to this resource, and that request is
128 * uncompleted this function will just return that request
130 virtual ResourceRequest* getRequest(DynInstPtr _inst, int stage_num,
131 int res_idx, int slot_num,
134 /** Schedule Execution of This Resource For A Given Slot*/
135 void scheduleExecution(int slot_idx);
137 /** Execute the function of this resource. The Default is action
138 * is to do nothing. More specific models will derive from this
139 * class and define their own execute function.
141 virtual void execute(int slot_idx);
143 /** Fetch on behalf of an instruction. Will check to see
144 * if instruction is actually in resource before
145 * trying to fetch. Needs to be defined for derived units.
147 virtual Fault doFetchAccess(DynInstPtr inst)
148 { panic("doFetchAccess undefined for %s", name()); return NoFault; }
150 /** Read/Write on behalf of an instruction. Will check to see
151 * if instruction is actually in resource before
152 * trying to do access.Needs to be defined for derived units.
154 virtual void doCacheAccess(DynInstPtr inst, uint64_t *write_result = NULL,
155 CacheReqPtr split_req = NULL)
156 { panic("doCacheAccess undefined for %s", name()); }
158 /** Setup Squash to be sent out to pipeline and resource pool */
159 void setupSquash(DynInstPtr inst, int stage_num, ThreadID tid);
161 /** Squash All Requests After This Seq Num */
162 virtual void squash(DynInstPtr inst, int stage_num,
163 InstSeqNum squash_seq_num, ThreadID tid);
165 /** Squash Requests Due to a Memory Stall (By Default, same as "squash" */
166 virtual void squashDueToMemStall(DynInstPtr inst, int stage_num,
167 InstSeqNum squash_seq_num, ThreadID tid);
169 /** Handle Squash & Trap that occured from an instruction in a resource */
170 void squashThenTrap(int stage_num, DynInstPtr inst);
172 /** The number of instructions available that this resource can
177 /** The number of instructions using this resource */
180 /** Schedule resource event, regardless of its current state. */
181 void scheduleEvent(int slot_idx, int delay);
183 /** Find instruction in list, Schedule resource event, regardless of its
185 bool scheduleEvent(DynInstPtr inst, int delay);
187 /** Unschedule resource event, regardless of its current state. */
188 void unscheduleEvent(int slot_idx);
190 /** Unschedule resource event, regardless of its current state. */
191 bool unscheduleEvent(DynInstPtr inst);
193 /** Return the number of cycles in 'Tick' format */
194 Tick ticks(int numCycles);
196 /** Find the request that corresponds to this instruction */
197 virtual ResReqPtr findRequest(DynInstPtr inst);
200 void rejectRequest(DynInstPtr inst);
202 /** Request a Resource again. Some resources have to special process this
203 * in subsequent accesses.
205 virtual void requestAgain(DynInstPtr inst, bool &try_request);
207 /** Return Latency of Resource */
208 /* Can be overridden for complex cases */
209 virtual int getLatency(int slot_num) { return latency; }
212 /** The name of this resource */
215 /** ID of the resource. The Resource Pool uses this # to identify this
220 /** The number of instructions the resource can simultaneously
225 /** Constant latency for this resource.
226 * Note: Dynamic latency resources set this to 0 and
227 * manage the latency themselves
232 /** List of all Requests the Resource is Servicing. Each request
233 represents part of the resource's bandwidth
235 std::vector<ResReqPtr> reqs;
237 /** A list of all the available execution slots for this resource.
238 * This correlates with the actual resource event idx.
240 std::vector<int> availSlots;
242 /** The CPU(s) that this resource interacts with */
246 /** The resource event used for scheduling resource slots on the
249 ResourceEvent *resourceEvent;
251 /** Default denied resource request pointer*/
255 class ResourceEvent : public Event
258 /** Pointer to the Resource this is an event for */
262 /// Resource events that come before other associated CPU events
263 /// (for InOrderCPU model).
264 /// check src/sim/eventq.hh for more event priorities.
265 enum InOrderPriority {
266 Resource_Event_Pri = 45,
269 /** The Resource Slot that this event is servicing */
272 /** Constructs a resource event. */
274 ResourceEvent(Resource *res, int slot_idx);
275 virtual ~ResourceEvent() { }
277 /** Initialize data for this resource event. */
278 virtual void init(Resource *res, int slot_idx);
280 /** Processes a resource event. */
281 virtual void process();
283 /** Returns the description of the resource event. */
284 const char *description() const;
286 /** Set slot idx for event */
287 void setSlot(int slot) { slotIdx = slot; }
289 /** Schedule resource event, regardless of its current state. */
290 void scheduleEvent(int delay);
292 /** Unschedule resource event, regardless of its current state. */
293 void unscheduleEvent()
301 class ResourceRequest
304 typedef ThePipeline::DynInstPtr DynInstPtr;
308 static int maxReqCount;
310 friend class Resource;
313 ResourceRequest(Resource *_res);
315 virtual ~ResourceRequest();
321 void setRequest(DynInstPtr _inst, int stage_num,
322 int res_idx, int slot_num, unsigned _cmd);
324 virtual void clearRequest();
326 /** Acknowledge that this is a request is done and remove
329 void done(bool completed = true);
333 /////////////////////////////////////////////
335 // GET RESOURCE REQUEST IDENTIFICATION / INFO
337 /////////////////////////////////////////////
338 /** Get Resource Index */
339 int getResIdx() { return resIdx; }
341 /** Get Slot Number */
342 int getSlot() { return slotNum; }
343 bool hasSlot() { return slotNum >= 0; }
345 /** Get Stage Number */
346 int getStageNum() { return stageNum; }
348 /** Set/Get Thread Ids */
349 void setTid(ThreadID _tid) { tid = _tid; }
350 ThreadID getTid() { return tid; }
352 /** Instruction this request is for */
353 DynInstPtr getInst() { return inst; }
355 /** Data from this request. Overridden by Resource-Specific Request
358 virtual PacketDataPtr getData() { return NULL; }
360 /** Pointer to Resource that is being used */
363 /** Instruction being used */
366 /** Not guaranteed to be set, used for debugging */
369 /** Command For This Resource */
378 ////////////////////////////////////////
380 // GET RESOURCE REQUEST STATUS FROM VARIABLES
382 ////////////////////////////////////////
383 /** Get/Set Completed variables */
384 bool isCompleted() { return completed; }
385 void setCompleted(bool cond = true) { completed = cond; }
387 /** Get/Set Squashed variables */
388 bool isSquashed() { return squashed; }
389 void setSquashed() { squashed = true; }
391 /** Get/Set IsProcessing variables */
392 bool isProcessing() { return processing; }
393 void setProcessing(bool cond = true) { processing = cond; }
395 /** Get/Set IsWaiting variables */
396 bool isMemStall() { return memStall; }
397 void setMemStall(bool stall = true) { memStall = stall; }
400 /** Resource Identification */
406 /** Resource Request Status */
414 #endif //__CPU_INORDER_RESOURCE_HH__