2 * Copyright (c) 2007 MIPS Technologies, Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 * Authors: Korey Sewell
32 #ifndef __CPU_INORDER_RESOURCE_HH__
33 #define __CPU_INORDER_RESOURCE_HH__
39 #include "cpu/inst_seq.hh"
40 #include "cpu/inorder/inorder_dyn_inst.hh"
41 #include "cpu/inorder/pipeline_traits.hh"
42 #include "sim/eventq.hh"
43 #include "sim/sim_object.hh"
48 class ResourceRequest;
50 typedef ResourceRequest ResReq;
51 typedef ResourceRequest* ResReqPtr;
55 typedef ThePipeline::DynInstPtr DynInstPtr;
57 friend class ResourceEvent;
58 friend class ResourceRequest;
61 Resource(std::string res_name, int res_id, int res_width,
62 int res_latency, InOrderCPU *_cpu);
63 virtual ~Resource() {}
65 /** Return name of this resource */
66 virtual std::string name();
68 /** Define this function if resource, has a port to connect to an outside
71 virtual Port* getPort(const std::string &if_name, int idx) { return NULL; }
73 /** Return ID for this resource */
74 int getId() { return id; }
76 /** Any extra initiliazation stuff can be set up using this function that
77 * should get called before the simulation starts (tick 0)
80 virtual void initSlots();
82 /** Register Stats for this resource */
83 virtual void regStats();
85 /** Resources that care about thread activation override this. */
86 virtual void activateThread(unsigned tid) { }
88 /** Deactivate Thread. Default action is to squash all instructions
89 * from deactivated thread.
91 virtual void deactivateThread(unsigned tid);
93 /** Resources that care when an instruction has been graduated
96 virtual void instGraduated(InstSeqNum seq_num,unsigned tid) { }
98 /** Request usage of this resource. Returns a ResourceRequest object
99 * with all the necessary resource information
101 virtual ResourceRequest* request(DynInstPtr inst);
103 /** Get the next available slot in this resource. Instruction is passed
104 * so that resources can check the instruction before allocating a slot
107 virtual int getSlot(DynInstPtr inst);
109 /** Find the slot that this instruction is using in a resource */
110 virtual int findSlot(DynInstPtr inst);
112 /** Free a resource slot */
113 virtual void freeSlot(int slot_idx);
115 /** Request usage of a resource for this instruction. If this instruction already
116 * has made this request to this resource, and that request is uncompleted
117 * this function will just return that request
119 virtual ResourceRequest* getRequest(DynInstPtr _inst, int stage_num,
120 int res_idx, int slot_num,
123 /** Schedule Execution of This Resource For A Given Slot*/
124 virtual void scheduleExecution(int slot_idx);
126 /** Execute the function of this resource. The Default is action
127 * is to do nothing. More specific models will derive from this
128 * class and define their own execute function.
130 virtual void execute(int slot_idx);
132 /** Fetch on behalf of an instruction. Will check to see
133 * if instruction is actually in resource before
134 * trying to fetch. Needs to be defined for derived units.
136 virtual Fault doFetchAccess(DynInstPtr inst)
137 { panic("doFetchAccess undefined for %s", name()); return NoFault; }
139 /** Read/Write on behalf of an instruction. Will check to see
140 * if instruction is actually in resource before
141 * trying to do access.Needs to be defined for derived units.
143 virtual Fault doDataAccess(DynInstPtr inst)
144 { panic("doDataAccess undefined for %s", name()); return NoFault; }
146 /** Squash All Requests After This Seq Num */
147 virtual void squash(DynInstPtr inst, int stage_num, InstSeqNum squash_seq_num, unsigned tid);
149 /** The number of instructions available that this resource can
154 /** The number of instructions using this resource */
157 /** Schedule resource event, regardless of its current state. */
158 void scheduleEvent(int slot_idx, int delay);
160 /** Find instruction in list, Schedule resource event, regardless of its current state. */
161 bool scheduleEvent(DynInstPtr inst, int delay);
163 /** Unschedule resource event, regardless of its current state. */
164 void unscheduleEvent(int slot_idx);
166 /** Unschedule resource event, regardless of its current state. */
167 bool unscheduleEvent(DynInstPtr inst);
169 /** Return the number of cycles in 'Tick' format */
170 Tick ticks(int numCycles);
172 /** Find the request that corresponds to this instruction */
173 virtual ResReqPtr findRequest(DynInstPtr inst);
176 virtual void rejectRequest(DynInstPtr inst);
178 /** Request a Resource again. Some resources have to special process this
179 * in subsequent accesses.
181 virtual void requestAgain(DynInstPtr inst, bool &try_request);
183 /** Return Latency of Resource */
184 /* Can be overridden for complex cases */
185 virtual int getLatency(int slot_num) { return latency; }
188 /** The name of this resource */
191 /** ID of the resource. The Resource Pool uses this # to identify this
196 /** The number of instructions the resource can simultaneously
201 /** Constant latency for this resource.
202 * Note: Dynamic latency resources set this to 0 and
203 * manage the latency themselves
208 /** Mapping of slot-numbers to the resource-request pointers */
209 std::map<int, ResReqPtr> reqMap;
211 /** A list of all the available execution slots for this resource.
212 * This correlates with the actual resource event idx.
214 std::vector<int> availSlots;
216 /** The CPU(s) that this resource interacts with */
220 /** The resource event used for scheduling resource slots on the
223 ResourceEvent *resourceEvent;
225 /** Default denied resource request pointer*/
229 /////////////////////////////////////////////////////////////////
231 // DEFAULT RESOURCE STATISTICS
233 /////////////////////////////////////////////////////////////////
234 /** Number of Instruction Requests the Resource Processes */
235 Stats::Scalar instReqsProcessed;
238 class ResourceEvent : public Event
241 /** Pointer to the CPU. */
245 /// Resource events that come before other associated CPU events
246 /// (for InOrderCPU model).
247 /// check src/sim/eventq.hh for more event priorities.
248 enum InOrderPriority {
249 Resource_Event_Pri = 45,
252 /** The Resource Slot that this event is servicing */
255 /** Constructs a resource event. */
257 ResourceEvent(Resource *res, int slot_idx);
258 virtual ~ResourceEvent() { }
260 /** Initialize data for this resource event. */
261 virtual void init(Resource *res, int slot_idx);
263 /** Processes a resource event. */
264 virtual void process();
266 /** Returns the description of the resource event. */
267 const char *description();
269 /** Set slot idx for event */
270 void setSlot(int slot) { slotIdx = slot; }
272 /** Schedule resource event, regardless of its current state. */
273 void scheduleEvent(int delay)
276 mainEventQueue.reschedule(this, curTick + resource->ticks(delay));
277 else if (!scheduled())
278 mainEventQueue.schedule(this, curTick + resource->ticks(delay));
281 /** Unschedule resource event, regardless of its current state. */
282 void unscheduleEvent()
290 class ResourceRequest
293 typedef ThePipeline::DynInstPtr DynInstPtr;
297 static int resReqCount;
300 ResourceRequest(Resource *_res, DynInstPtr _inst, int stage_num,
301 int res_idx, int slot_num, unsigned _cmd)
302 : res(_res), inst(_inst), cmd(_cmd), stageNum(stage_num),
303 resIdx(res_idx), slotNum(slot_num), completed(false),
304 squashed(false), processing(false), waiting(false)
308 DPRINTF(ResReqCount, "Res. Req %i created. resReqCount=%i.\n", reqID, resReqCount);
310 if (resReqCount > 100) {
311 fatal("Too many undeleted resource requests. Memory leak?\n");
315 virtual ~ResourceRequest()
318 DPRINTF(ResReqCount, "Res. Req %i deleted. resReqCount=%i.\n", reqID, resReqCount);
323 /** Acknowledge that this is a request is done and remove
326 void done(bool completed = true);
328 /////////////////////////////////////////////
330 // GET RESOURCE REQUEST IDENTIFICATION / INFO
332 /////////////////////////////////////////////
333 /** Get Resource Index */
334 int getResIdx() { return resIdx; }
336 /** Get Slot Number */
337 int getSlot() { return slotNum; }
339 /** Get Stage Number */
340 int getStageNum() { return stageNum; }
342 /** Set/Get Thread Ids */
343 void setTid(unsigned _tid) { tid = _tid; }
344 int getTid() { return tid; }
346 /** Instruction this request is for */
347 DynInstPtr getInst() { return inst; }
349 /** Data from this request. Overridden by Resource-Specific Request
352 virtual PacketDataPtr getData() { return NULL; }
354 /** Pointer to Resource that is being used */
357 /** Instruction being used */
360 /** Fault Associated With This Resource Request */
363 /** Command For This Resource */
366 ////////////////////////////////////////
368 // GET RESOURCE REQUEST STATUS FROM VARIABLES
370 ////////////////////////////////////////
371 /** Get/Set Completed variables */
372 bool isCompleted() { return completed; }
373 void setCompleted(bool cond = true) { completed = cond; }
375 /** Get/Set Squashed variables */
376 bool isSquashed() { return squashed; }
377 void setSquashed() { squashed = true; }
379 /** Get/Set IsProcessing variables */
380 bool isProcessing() { return processing; }
381 void setProcessing() { processing = true; }
383 /** Get/Set IsWaiting variables */
384 bool isWaiting() { return waiting; }
385 void setWaiting() { waiting = true; }
388 /** Resource Identification */
394 /** Resource Status */
401 #endif //__CPU_INORDER_RESOURCE_HH__