src/cpu/inorder/resources/agen_unit.cc

   1 /*
   2  * Copyright (c) 2007 MIPS Technologies, Inc.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Korey Sewell
  29  *
  30  */
  31
  32 #include "cpu/inorder/resources/agen_unit.hh"
  33
  34 AGENUnit::AGENUnit(std::string res_name, int res_id, int res_width,
  35                    int res_latency, InOrderCPU *_cpu,
  36                    ThePipeline::Params *params)
  37     : Resource(res_name, res_id, res_width, res_latency, _cpu)
  38 { }
  39
  40 void
  41 AGENUnit::regStats()
  42 {
  43     agens
  44         .name(name() + ".agens")
  45         .desc("Number of Address Generations");
  46
  47     Resource::regStats();
  48 }
  49
  50 void
  51 AGENUnit::execute(int slot_num)
  52 {
  53     ResourceRequest* agen_req = reqs[slot_num];
  54     DynInstPtr inst = reqs[slot_num]->inst;
  55 #if TRACING_ON
  56     ThreadID tid = inst->readTid();
  57 #endif
  58     int seq_num = inst->seqNum;
  59
  60     switch (agen_req->cmd)
  61     {
  62       case GenerateAddr:
  63         {
  64             // Load/Store Instruction
  65             if (inst->isMemRef()) {
  66                 DPRINTF(InOrderAGEN,
  67                         "[tid:%i] Generating Address for [sn:%i] (%s).\n",
  68                         tid, seq_num, inst->staticInst->getName());
  69
  70                 inst->fault = inst->calcEA();
  71                 inst->setMemAddr(inst->getEA());
  72
  73                 DPRINTF(InOrderAGEN,
  74                     "[tid:%i] [sn:%i] Effective address calculated as: %#x\n",
  75                     tid, seq_num, inst->getEA());
  76
  77                 if (inst->fault == NoFault) {
  78                     agen_req->done();
  79                 } else {
  80                     fatal("%s encountered while calculating address [sn:%i]",
  81                           inst->fault->name(), seq_num);
  82                 }
  83
  84                 agens++;
  85             } else {
  86                 DPRINTF(InOrderAGEN,
  87                         "[tid:] Ignoring non-memory instruction [sn:%i]\n",
  88                         tid, seq_num);
  89                 agen_req->done();
  90             }
  91         }
  92         break;
  93
  94       default:
  95         fatal("Unrecognized command to %s", resName);
  96     }
  97 }