src/cpu/inorder/resources/agen_unit.cc

   1 /*
   2  * Copyright (c) 2007 MIPS Technologies, Inc.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Korey Sewell
  29  *
  30  */
  31
  32 #include "cpu/inorder/resources/agen_unit.hh"
  33
  34 AGENUnit::AGENUnit(std::string res_name, int res_id, int res_width,
  35                    int res_latency, InOrderCPU *_cpu, ThePipeline::Params *params)
  36     : Resource(res_name, res_id, res_width, res_latency, _cpu)
  37 { }
  38
  39 void
  40 AGENUnit::execute(int slot_num)
  41 {
  42     ResourceRequest* agen_req = reqMap[slot_num];
  43     DynInstPtr inst = reqMap[slot_num]->inst;
  44     Fault fault = reqMap[slot_num]->fault;
  45     int tid;
  46     int seq_num = inst->seqNum;
  47
  48     tid = inst->readTid();
  49     agen_req->fault = NoFault;
  50
  51     switch (agen_req->cmd)
  52     {
  53       case GenerateAddr:
  54         {
  55             // Load/Store Instruction
  56             if (inst->isMemRef()) {
  57                 DPRINTF(InOrderAGEN, "[tid:%i] Generating Address for [sn:%i] (%s).\n",
  58                         tid, inst->seqNum, inst->staticInst->getName());
  59
  60                 fault = inst->calcEA();
  61                 inst->setMemAddr(inst->getEA());
  62
  63                 DPRINTF(InOrderAGEN, "[tid:%i] [sn:%i] Effective address calculated to be: "
  64                         "%#x.\n", tid, inst->seqNum, inst->getEA());
  65
  66                 if (fault == NoFault) {
  67                     agen_req->done();
  68                 } else {
  69                     fatal("%s encountered while calculating address for [sn:%i]",fault->name(), seq_num);
  70                 }
  71             } else {
  72                 DPRINTF(InOrderAGEN, "[tid:] Ignoring non-memory instruction [sn:%i].\n", tid, seq_num);
  73                 agen_req->done();
  74             }
  75         }
  76         break;
  77
  78       default:
  79         fatal("Unrecognized command to %s", resName);
  80     }
  81 }