src/cpu/inorder/resources/bpred_unit.hh

   1 /*
   2  * Copyright (c) 2004-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Kevin Lim
  29  *          Korey Sewell
  30  */
  31
  32 #ifndef __CPU_INORDER_BPRED_UNIT_HH__
  33 #define __CPU_INORDER_BPRED_UNIT_HH__
  34
  35 #include <list>
  36
  37 #include "arch/isa_traits.hh"
  38 #include "base/statistics.hh"
  39 #include "cpu/inorder/inorder_dyn_inst.hh"
  40 #include "cpu/inorder/pipeline_traits.hh"
  41 #include "cpu/inorder/resource.hh"
  42 #include "cpu/pred/2bit_local.hh"
  43 #include "cpu/pred/btb.hh"
  44 #include "cpu/pred/ras.hh"
  45 #include "cpu/pred/tournament.hh"
  46 #include "cpu/inst_seq.hh"
  47 #include "params/InOrderCPU.hh"
  48
  49 /**
  50  * Basically a wrapper class to hold both the branch predictor
  51  * and the BTB.
  52  */
  53 class BPredUnit
  54 {
  55   private:
  56
  57     enum PredType {
  58         Local,
  59         Tournament
  60     };
  61
  62     PredType predictor;
  63
  64   public:
  65
  66     /**
  67      * @param params The params object, that has the size of the BP and BTB.
  68      */
  69     BPredUnit(Resource *_res, ThePipeline::Params *params);
  70
  71     std::string name();
  72
  73     /**
  74      * Registers statistics.
  75      */
  76     void regStats();
  77
  78     void switchOut();
  79
  80     void takeOverFrom();
  81
  82     /**
  83      * Predicts whether or not the instruction is a taken branch, and the
  84      * target of the branch if it is taken.
  85      * @param inst The branch instruction.
  86      * @param predPC The predicted PC is passed back through this parameter.
  87      * @param tid The thread id.
  88      * @return Returns if the branch is taken or not.
  89      */
  90     bool predict(ThePipeline::DynInstPtr &inst,
  91             TheISA::PCState &predPC, ThreadID tid);
  92
  93     // @todo: Rename this function.
  94     void BPUncond(void * &bp_history);
  95
  96     /**
  97      * Tells the branch predictor to commit any updates until the given
  98      * sequence number.
  99      * @param done_sn The sequence number to commit any older updates up until.
 100      * @param tid The thread id.
 101      */
 102     void update(const InstSeqNum &done_sn, ThreadID tid);
 103
 104     /**
 105      * Squashes all outstanding updates until a given sequence number.
 106      * @param squashed_sn The sequence number to squash any younger updates up
 107      * until.
 108      * @param tid The thread id.
 109      */
 110     void squash(const InstSeqNum &squashed_sn, ThreadID tid,
 111                 ThreadID asid = 0);
 112
 113     /**
 114      * Squashes all outstanding updates until a given sequence number, and
 115      * corrects that sn's update with the proper address and taken/not taken.
 116      * @param squashed_sn The sequence number to squash any younger updates up
 117      * until.
 118      * @param corrTarget The correct branch target.
 119      * @param actually_taken The correct branch direction.
 120      * @param tid The thread id.
 121      */
 122     void squash(const InstSeqNum &squashed_sn,
 123                 const TheISA::PCState &corrTarget, bool actually_taken,
 124                 ThreadID tid, ThreadID asid = 0);
 125
 126     /**
 127      * @param bp_history Pointer to the history object.  The predictor
 128      * will need to update any state and delete the object.
 129      */
 130     void BPSquash(void *bp_history);
 131
 132     /**
 133      * Looks up a given PC in the BP to see if it is taken or not taken.
 134      * @param inst_PC The PC to look up.
 135      * @param bp_history Pointer that will be set to an object that
 136      * has the branch predictor state associated with the lookup.
 137      * @return Whether the branch is taken or not taken.
 138      */
 139     bool BPLookup(Addr instPC, void * &bp_history);
 140
 141     /**
 142      * Looks up a given PC in the BTB to see if a matching entry exists.
 143      * @param inst_PC The PC to look up.
 144      * @return Whether the BTB contains the given PC.
 145      */
 146     bool BTBValid(Addr &inst_PC)
 147     { return BTB.valid(inst_PC, 0); }
 148
 149     /**
 150      * Looks up a given PC in the BTB to get the predicted target.
 151      * @param inst_PC The PC to look up.
 152      * @return The address of the target of the branch.
 153      */
 154     TheISA::PCState BTBLookup(Addr instPC)
 155     { return BTB.lookup(instPC, 0); }
 156
 157     /**
 158      * Updates the BP with taken/not taken information.
 159      * @param instPC The branch's PC that will be updated.
 160      * @param taken Whether the branch was taken or not taken.
 161      * @param bp_history Pointer to the branch predictor state that is
 162      * associated with the branch lookup that is being updated.
 163      * @todo Make this update flexible enough to handle a global predictor.
 164      */
 165     void BPUpdate(Addr instPC, bool taken, void *bp_history);
 166
 167     /**
 168      * Updates the BTB with the target of a branch.
 169      * @param inst_PC The branch's PC that will be updated.
 170      * @param target_PC The branch's target that will be added to the BTB.
 171      */
 172     void BTBUpdate(Addr instPC, const TheISA::PCState &targetPC)
 173     { BTB.update(instPC, targetPC, 0); }
 174
 175     void dump();
 176
 177   private:
 178     int instSize;
 179     Resource *res;
 180
 181     struct PredictorHistory {
 182         /**
 183          * Makes a predictor history struct that contains any
 184          * information needed to update the predictor, BTB, and RAS.
 185          */
 186         PredictorHistory(const InstSeqNum &seq_num,
 187                          const TheISA::PCState &instPC, bool pred_taken,
 188                          void *bp_history, ThreadID _tid)
 189             : seqNum(seq_num), pc(instPC), rasTarget(0), RASIndex(0),
 190               tid(_tid), predTaken(pred_taken), usedRAS(0), wasCall(0),
 191               bpHistory(bp_history)
 192         {}
 193
 194         /** The sequence number for the predictor history entry. */
 195         InstSeqNum seqNum;
 196
 197         /** The PC associated with the sequence number. */
 198         TheISA::PCState pc;
 199
 200         /** The RAS target (only valid if a return). */
 201         TheISA::PCState rasTarget;
 202
 203         /** The RAS index of the instruction (only valid if a call). */
 204         unsigned RASIndex;
 205
 206         /** The thread id. */
 207         ThreadID tid;
 208
 209         /** Whether or not it was predicted taken. */
 210         bool predTaken;
 211
 212         /** Whether or not the RAS was used. */
 213         bool usedRAS;
 214
 215         /** Whether or not the instruction was a call. */
 216         bool wasCall;
 217
 218         /** Pointer to the history object passed back from the branch
 219          * predictor.  It is used to update or restore state of the
 220          * branch predictor.
 221          */
 222         void *bpHistory;
 223     };
 224
 225     typedef std::list<PredictorHistory> History;
 226     typedef History::iterator HistoryIt;
 227
 228     /**
 229      * The per-thread predictor history. This is used to update the predictor
 230      * as instructions are committed, or restore it to the proper state after
 231      * a squash.
 232      */
 233     History predHist[ThePipeline::MaxThreads];
 234
 235     /** The local branch predictor. */
 236     LocalBP *localBP;
 237
 238     /** The tournament branch predictor. */
 239     TournamentBP *tournamentBP;
 240
 241     /** The BTB. */
 242     DefaultBTB BTB;
 243
 244     /** The per-thread return address stack. */
 245     ReturnAddrStack RAS[ThePipeline::MaxThreads];
 246
 247     /** Stat for number of BP lookups. */
 248     Stats::Scalar lookups;
 249     /** Stat for number of conditional branches predicted. */
 250     Stats::Scalar condPredicted;
 251     /** Stat for number of conditional branches predicted incorrectly. */
 252     Stats::Scalar condIncorrect;
 253     /** Stat for number of BTB lookups. */
 254     Stats::Scalar BTBLookups;
 255     /** Stat for number of BTB hits. */
 256     Stats::Scalar BTBHits;
 257     /** Stat for number of times the BTB is correct. */
 258     Stats::Scalar BTBCorrect;
 259     /** Stat for number of times the RAS is used to get a target. */
 260     Stats::Scalar usedRAS;
 261     /** Stat for number of times the RAS is incorrect. */
 262     Stats::Scalar RASIncorrect;
 263     Stats::Formula BTBHitPct;
 264 };
 265
 266 #endif // __CPU_INORDER_BPRED_UNIT_HH__