2 * Copyright (c) 2007 MIPS Technologies, Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 * Authors: Korey Sewell
32 #ifndef __CPU_INORDER_INST_BUFF_UNIT_HH__
33 #define __CPU_INORDER_INST_BUFF_UNIT_HH__
39 #include "cpu/inorder/cpu.hh"
40 #include "cpu/inorder/inorder_dyn_inst.hh"
41 #include "cpu/inorder/pipeline_traits.hh"
42 #include "cpu/inorder/resource.hh"
44 class InstBuffer : public Resource {
46 typedef ThePipeline::DynInstPtr DynInstPtr;
58 InstBuffer(std::string res_name, int res_id, int res_width,
59 Cycles res_latency, InOrderCPU *_cpu,
60 ThePipeline::Params *params);
64 void execute(int slot_num);
66 void insert(DynInstPtr inst);
68 void remove(DynInstPtr inst);
70 void pop(ThreadID tid);
72 DynInstPtr top(ThreadID tid);
74 void squash(DynInstPtr inst, int stage_num,
75 InstSeqNum squash_seq_num, ThreadID tid);
77 /** List of instructions this resource is currently
80 std::list<DynInstPtr> instList;
83 /////////////////////////////////////////////////////////////////
85 // RESOURCE STATISTICS
87 /////////////////////////////////////////////////////////////////
88 /** Number of Instruction Requests the Resource Processes */
89 Stats::Scalar instsBypassed;
93 #endif //__CPU_INORDER_INST_BUFF_UNIT_HH__