src/cpu/inorder/thread_context.cc

   1 /*
   2  * Copyright (c) 2007 MIPS Technologies, Inc.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Korey Sewell
  29  *
  30  */
  31
  32 #include "arch/isa_traits.hh"
  33 #include "config/the_isa.hh"
  34 #include "cpu/exetrace.hh"
  35 #include "cpu/inorder/thread_context.hh"
  36
  37 using namespace TheISA;
  38
  39 #if FULL_SYSTEM
  40
  41 VirtualPort *
  42 InOrderThreadContext::getVirtPort()
  43 {
  44     return thread->getVirtPort();
  45 }
  46
  47
  48 void
  49 InOrderThreadContext::dumpFuncProfile()
  50 {
  51     thread->dumpFuncProfile();
  52 }
  53
  54
  55 Tick
  56 InOrderThreadContext::readLastActivate()
  57 {
  58     return thread->lastActivate;
  59 }
  60
  61
  62 Tick
  63 InOrderThreadContext::readLastSuspend()
  64 {
  65     return thread->lastSuspend;
  66 }
  67
  68
  69 void
  70 InOrderThreadContext::profileClear()
  71 {
  72     thread->profileClear();
  73 }
  74
  75
  76 void
  77 InOrderThreadContext::profileSample()
  78 {
  79     thread->profileSample();
  80 }
  81 #endif
  82
  83 void
  84 InOrderThreadContext::takeOverFrom(ThreadContext *old_context)
  85 {
  86     // some things should already be set up
  87     assert(getSystemPtr() == old_context->getSystemPtr());
  88 #if !FULL_SYSTEM
  89     assert(getProcessPtr() == old_context->getProcessPtr());
  90 #endif
  91
  92
  93
  94     // copy over functional state
  95     setStatus(old_context->status());
  96     copyArchRegs(old_context);
  97
  98 #if !FULL_SYSTEM
  99     thread->funcExeInst = old_context->readFuncExeInst();
 100 #endif
 101
 102     old_context->setStatus(ThreadContext::Halted);
 103
 104     thread->inSyscall = false;
 105     thread->trapPending = false;
 106 }
 107
 108 void
 109 InOrderThreadContext::activate(int delay)
 110 {
 111     DPRINTF(InOrderCPU, "Calling activate on Thread Context %d\n",
 112             getThreadNum());
 113
 114     if (thread->status() == ThreadContext::Active)
 115         return;
 116
 117     thread->setStatus(ThreadContext::Active);
 118
 119     cpu->activateContext(thread->readTid(), delay);
 120 }
 121
 122
 123 void
 124 InOrderThreadContext::suspend(int delay)
 125 {
 126     DPRINTF(InOrderCPU, "Calling suspend on Thread Context %d\n",
 127             getThreadNum());
 128
 129     if (thread->status() == ThreadContext::Suspended)
 130         return;
 131
 132     thread->setStatus(ThreadContext::Suspended);
 133     cpu->suspendContext(thread->readTid(), delay);
 134 }
 135
 136 void
 137 InOrderThreadContext::halt(int delay)
 138 {
 139     DPRINTF(InOrderCPU, "Calling halt on Thread Context %d\n",
 140             getThreadNum());
 141
 142     if (thread->status() == ThreadContext::Halted)
 143         return;
 144
 145     thread->setStatus(ThreadContext::Halted);
 146     cpu->haltContext(thread->readTid(), delay);
 147 }
 148
 149
 150 void
 151 InOrderThreadContext::regStats(const std::string &name)
 152 {
 153 #if FULL_SYSTEM
 154     //thread->kernelStats = new Kernel::Statistics(cpu->system);
 155     //thread->kernelStats->regStats(name + ".kern");
 156 #endif
 157     ;
 158 }
 159
 160
 161 void
 162 InOrderThreadContext::serialize(std::ostream &os)
 163 {
 164     panic("serialize unimplemented");
 165 }
 166
 167
 168 void
 169 InOrderThreadContext::unserialize(Checkpoint *cp, const std::string &section)
 170 {
 171     panic("unserialize unimplemented");
 172 }
 173
 174 TheISA::MachInst
 175 InOrderThreadContext:: getInst()
 176 {
 177     return thread->getInst();
 178 }
 179
 180
 181 void
 182 InOrderThreadContext::copyArchRegs(ThreadContext *src_tc)
 183 {
 184     TheISA::copyRegs(src_tc, this);
 185 }
 186
 187
 188 void
 189 InOrderThreadContext::clearArchRegs()
 190 {}
 191
 192
 193 uint64_t
 194 InOrderThreadContext::readIntReg(int reg_idx)
 195 {
 196     return cpu->readIntReg(reg_idx, thread->readTid());
 197 }
 198
 199 FloatReg
 200 InOrderThreadContext::readFloatReg(int reg_idx)
 201 {
 202     return cpu->readFloatReg(reg_idx, thread->readTid());
 203 }
 204
 205 FloatRegBits
 206 InOrderThreadContext::readFloatRegBits(int reg_idx)
 207 {
 208     return cpu->readFloatRegBits(reg_idx, thread->readTid());
 209 }
 210
 211 uint64_t
 212 InOrderThreadContext::readRegOtherThread(int reg_idx, ThreadID tid)
 213 {
 214     return cpu->readRegOtherThread(reg_idx, tid);
 215 }
 216
 217 void
 218 InOrderThreadContext::setIntReg(int reg_idx, uint64_t val)
 219 {
 220     cpu->setIntReg(reg_idx, val, thread->readTid());
 221 }
 222
 223 void
 224 InOrderThreadContext::setFloatReg(int reg_idx, FloatReg val)
 225 {
 226     cpu->setFloatReg(reg_idx, val, thread->readTid());
 227 }
 228
 229 void
 230 InOrderThreadContext::setFloatRegBits(int reg_idx, FloatRegBits val)
 231 {
 232     cpu->setFloatRegBits(reg_idx, val, thread->readTid());
 233 }
 234
 235 void
 236 InOrderThreadContext::setRegOtherThread(int misc_reg, const MiscReg &val,
 237                                         ThreadID tid)
 238 {
 239     cpu->setRegOtherThread(misc_reg, val, tid);
 240 }
 241
 242 void
 243 InOrderThreadContext::setPC(uint64_t val)
 244 {
 245     DPRINTF(InOrderCPU, "[tid:%i] Setting PC to %08p\n", thread->readTid(), val);
 246     cpu->setPC(val, thread->readTid());
 247 }
 248
 249 void
 250 InOrderThreadContext::setNextPC(uint64_t val)
 251 {
 252     DPRINTF(InOrderCPU, "[tid:%i] Setting NPC to %08p\n", thread->readTid(), val);
 253     cpu->setNextPC(val, thread->readTid());
 254 }
 255
 256 void
 257 InOrderThreadContext::setNextNPC(uint64_t val)
 258 {
 259     DPRINTF(InOrderCPU, "[tid:%i] Setting NNPC to %08p\n", thread->readTid(), val);
 260     cpu->setNextNPC(val, thread->readTid());
 261 }
 262
 263 void
 264 InOrderThreadContext::setMiscRegNoEffect(int misc_reg, const MiscReg &val)
 265 {
 266     cpu->setMiscRegNoEffect(misc_reg, val, thread->readTid());
 267 }
 268
 269 void
 270 InOrderThreadContext::setMiscReg(int misc_reg, const MiscReg &val)
 271 {
 272     cpu->setMiscReg(misc_reg, val, thread->readTid());
 273 }