O3: Track if the RAS has been pushed or not to pop the RAS if neccessary.
[gem5.git] / src / cpu / inorder / thread_state.hh
1 /*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Kevin Lim
29 */
30
31 #ifndef __CPU_INORDER_THREAD_STATE_HH__
32 #define __CPU_INORDER_THREAD_STATE_HH__
33
34 #include "arch/isa_traits.hh"
35 #include "base/callback.hh"
36 #include "base/output.hh"
37 #include "cpu/thread_context.hh"
38 #include "cpu/thread_state.hh"
39 #include "sim/sim_exit.hh"
40
41 class EndQuiesceEvent;
42 class Event;
43 class FunctionalMemory;
44 class FunctionProfile;
45 class InOrderCPU;
46 class Process;
47 class ProfileNode;
48
49 /**
50 * Class that has various thread state, such as the status, the
51 * current instruction being processed, whether or not the thread has
52 * a trap pending or is being externally updated, the ThreadContext
53 * pointer, etc. It also handles anything related to a specific
54 * thread's process, such as syscalls and checking valid addresses.
55 */
56 class InOrderThreadState : public ThreadState {
57 typedef ThreadContext::Status Status;
58
59 private:
60 /** Pointer to the CPU. */
61 InOrderCPU *cpu;
62
63 public:
64 /** Whether or not the thread is currently in syscall mode, and
65 * thus able to be externally updated without squashing.
66 */
67 bool inSyscall;
68
69 /** Whether or not the thread is currently waiting on a trap, and
70 * thus able to be externally updated without squashing.
71 */
72 bool trapPending;
73
74 InOrderThreadState(InOrderCPU *_cpu, ThreadID _thread_num,
75 Process *_process)
76 : ThreadState(reinterpret_cast<BaseCPU*>(_cpu), _thread_num,
77 _process),
78 cpu(_cpu), inSyscall(0), trapPending(0), lastGradIsBranch(false)
79 { }
80
81 /** Handles the syscall. */
82 void syscall(int64_t callnum) { process->syscall(callnum, tc); }
83
84 void dumpFuncProfile();
85
86 /** Pointer to the ThreadContext of this thread. */
87 ThreadContext *tc;
88
89 /** Returns a pointer to the TC of this thread. */
90 ThreadContext *getTC() { return tc; }
91
92 /** Is last instruction graduated a branch? */
93 bool lastGradIsBranch;
94 TheISA::PCState lastBranchPC;
95 };
96
97 #endif // __CPU_INORDER_THREAD_STATE_HH__