src/cpu/inst_pb_trace.hh

   1 /*
   2  * Copyright (c) 2014 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Redistribution and use in source and binary forms, with or without
  15  * modification, are permitted provided that the following conditions are
  16  * met: redistributions of source code must retain the above copyright
  17  * notice, this list of conditions and the following disclaimer;
  18  * redistributions in binary form must reproduce the above copyright
  19  * notice, this list of conditions and the following disclaimer in the
  20  * documentation and/or other materials provided with the distribution;
  21  * neither the name of the copyright holders nor the names of its
  22  * contributors may be used to endorse or promote products derived from
  23  * this software without specific prior written permission.
  24  *
  25  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  26  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  27  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  28  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  29  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  30  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  31  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  32  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  33  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  34  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  35  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  36  */
  37
  38 #ifndef __CPU_INST_PB_TRACE_HH__
  39 #define __CPU_INST_PB_TRACE_HH__
  40
  41 #include "arch/types.hh"
  42 #include "base/trace.hh"
  43 #include "base/types.hh"
  44 #include "cpu/static_inst_fwd.hh"
  45 #include "params/InstPBTrace.hh"
  46 #include "proto/protoio.hh"
  47 #include "sim/insttracer.hh"
  48
  49 class ThreadContext;
  50
  51 namespace ProtoMessage {
  52 class Inst;
  53 }
  54
  55 namespace Trace {
  56
  57 /**
  58  * This in an instruction tracer that records the flow of instructions through
  59  * multiple cpus and systems to a protobuf file specified by proto/inst.proto
  60  * for further analysis.
  61  */
  62
  63 class InstPBTraceRecord : public InstRecord
  64 {
  65   public:
  66     InstPBTraceRecord(InstPBTrace& _tracer, Tick when, ThreadContext *tc,
  67                       const StaticInstPtr si, TheISA::PCState pc,
  68                       const StaticInstPtr mi = NULL)
  69         : InstRecord(when, tc, si, pc, mi), tracer(_tracer)
  70     {}
  71
  72     /** called by the cpu when the instruction commits.
  73      * This implementation of dump calls InstPBTrace to output the contents to a
  74      * protobuf file
  75      */
  76     void dump() override;
  77
  78   protected:
  79     InstPBTrace& tracer;
  80
  81 };
  82
  83 class InstPBTrace : public InstTracer
  84 {
  85  public:
  86     InstPBTrace(const InstPBTraceParams *p);
  87     virtual ~InstPBTrace();
  88
  89     InstPBTraceRecord* getInstRecord(Tick when, ThreadContext *tc, const
  90                                     StaticInstPtr si, TheISA::PCState pc, const
  91                                     StaticInstPtr mi = NULL) override;
  92
  93   protected:
  94     std::unique_ptr<uint8_t []> buf;
  95     size_t bufSize;
  96
  97     /** One output stream for the entire simulation.
  98      * We encode the CPU & system ID so all we need is a single file
  99      */
 100     static ProtoOutputStream *traceStream;
 101
 102
 103     /** This is the message were working on writing. The majority of the message
 104      * exists however the memory accesses will be delayed.
 105      */
 106     ProtoMessage::Inst *curMsg;
 107
 108     /** Create the output file and write the header into it
 109      * @param filename the file to create (if ends with .gz it will be
 110      * compressed)
 111      */
 112     void createTraceFile(std::string filename);
 113
 114     /** If there is a pending message still write it out and then close the file
 115      */
 116     void closeStreams();
 117
 118     /** Write an instruction to the trace file
 119      * @param tc thread context for the cpu ID
 120      * @param si for the machInst and opClass
 121      * @param pc for the PC Addr
 122      */
 123     void traceInst(ThreadContext *tc, StaticInstPtr si, TheISA::PCState pc);
 124
 125     /** Write a memory request to the trace file as part of the cur instruction
 126      * @param si for the machInst and opClass
 127      * @param a address of the request
 128      * @param s size of the request
 129      * @param f flags for the request
 130      */
 131     void traceMem(StaticInstPtr si, Addr a, Addr s, unsigned f);
 132
 133     friend class InstPBTraceRecord;
 134 };
 135 } // namespace Trace
 136 #endif // __CPU_INST_PB_TRACE_HH__