src/cpu/memtest/memtest.hh

   1 /*
   2  * Copyright (c) 2002-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Erik Hallnor
  29  *          Steve Reinhardt
  30  */
  31
  32 #ifndef __CPU_MEMTEST_MEMTEST_HH__
  33 #define __CPU_MEMTEST_MEMTEST_HH__
  34
  35 #include <set>
  36
  37 #include "base/statistics.hh"
  38 #include "params/MemTest.hh"
  39 #include "sim/eventq.hh"
  40 #include "sim/sim_exit.hh"
  41 #include "sim/sim_object.hh"
  42 #include "sim/stats.hh"
  43 #include "mem/mem_object.hh"
  44 #include "mem/port.hh"
  45
  46 class Packet;
  47 class MemTest : public MemObject
  48 {
  49   public:
  50     typedef MemTestParams Params;
  51     MemTest(const Params *p);
  52
  53     virtual void init();
  54
  55     // register statistics
  56     virtual void regStats();
  57
  58     inline Tick ticks(int numCycles) const { return numCycles; }
  59
  60     // main simulation loop (one cycle)
  61     void tick();
  62
  63     virtual Port *getPort(const std::string &if_name, int idx = -1);
  64
  65     void printAddr(Addr a);
  66
  67   protected:
  68     class TickEvent : public Event
  69     {
  70       private:
  71         MemTest *cpu;
  72       public:
  73         TickEvent(MemTest *c)
  74             : Event(&mainEventQueue, CPU_Tick_Pri), cpu(c) {}
  75         void process() {cpu->tick();}
  76         virtual const char *description() { return "MemTest tick"; }
  77     };
  78
  79     TickEvent tickEvent;
  80
  81     class CpuPort : public Port
  82     {
  83         MemTest *memtest;
  84
  85       public:
  86
  87         CpuPort(const std::string &_name, MemTest *_memtest)
  88             : Port(_name, _memtest), memtest(_memtest)
  89         { }
  90
  91         bool snoopRangeSent;
  92
  93       protected:
  94
  95         virtual bool recvTiming(PacketPtr pkt);
  96
  97         virtual Tick recvAtomic(PacketPtr pkt);
  98
  99         virtual void recvFunctional(PacketPtr pkt);
 100
 101         virtual void recvStatusChange(Status status);
 102
 103         virtual void recvRetry();
 104
 105         virtual void getDeviceAddressRanges(AddrRangeList &resp,
 106                                             bool &snoop)
 107         { resp.clear(); snoop = false; }
 108     };
 109
 110     CpuPort cachePort;
 111     CpuPort funcPort;
 112
 113     bool snoopRangeSent;
 114
 115     class MemTestSenderState : public Packet::SenderState
 116     {
 117       public:
 118         /** Constructor. */
 119         MemTestSenderState(uint8_t *_data)
 120             : data(_data)
 121         { }
 122
 123         // Hold onto data pointer
 124         uint8_t *data;
 125     };
 126
 127     PacketPtr retryPkt;
 128
 129     bool accessRetry;
 130
 131     unsigned size;              // size of testing memory region
 132
 133     unsigned percentReads;      // target percentage of read accesses
 134     unsigned percentFunctional; // target percentage of functional accesses
 135     unsigned percentUncacheable;
 136
 137     int id;
 138
 139     std::set<unsigned> outstandingAddrs;
 140
 141     unsigned blockSize;
 142
 143     Addr blockAddrMask;
 144
 145     Addr blockAddr(Addr addr)
 146     {
 147         return (addr & ~blockAddrMask);
 148     }
 149
 150     Addr traceBlockAddr;
 151
 152     Addr baseAddr1;             // fix this to option
 153     Addr baseAddr2;             // fix this to option
 154     Addr uncacheAddr;
 155
 156     unsigned progressInterval;  // frequency of progress reports
 157     Tick nextProgressMessage;   // access # for next progress report
 158
 159     unsigned percentSourceUnaligned;
 160     unsigned percentDestUnaligned;
 161
 162     Tick noResponseCycles;
 163
 164     uint64_t numReads;
 165     uint64_t maxLoads;
 166
 167     bool atomic;
 168
 169     Stats::Scalar<> numReadsStat;
 170     Stats::Scalar<> numWritesStat;
 171     Stats::Scalar<> numCopiesStat;
 172
 173     // called by MemCompleteEvent::process()
 174     void completeRequest(PacketPtr pkt);
 175
 176     void sendPkt(PacketPtr pkt);
 177
 178     void doRetry();
 179
 180     friend class MemCompleteEvent;
 181 };
 182
 183 #endif // __CPU_MEMTEST_MEMTEST_HH__
 184
 185
 186