src/cpu/memtest/memtest.hh

   1 /*
   2  * Copyright (c) 2002-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Erik Hallnor
  29  *          Steve Reinhardt
  30  */
  31
  32 #ifndef __CPU_MEMTEST_MEMTEST_HH__
  33 #define __CPU_MEMTEST_MEMTEST_HH__
  34
  35 #include <set>
  36
  37 #include "base/statistics.hh"
  38 //#include "mem/functional/functional.hh"
  39 //#include "mem/mem_interface.hh"
  40 #include "sim/eventq.hh"
  41 #include "sim/sim_exit.hh"
  42 #include "sim/sim_object.hh"
  43 #include "sim/stats.hh"
  44 #include "mem/mem_object.hh"
  45 #include "mem/port.hh"
  46
  47 class Packet;
  48 class MemTest : public MemObject
  49 {
  50   public:
  51
  52     MemTest(const std::string &name,
  53 //          MemInterface *_cache_interface,
  54 //          PhysicalMemory *main_mem,
  55 //          PhysicalMemory *check_mem,
  56             unsigned _memorySize,
  57             unsigned _percentReads,
  58 //          unsigned _percentCopies,
  59             unsigned _percentUncacheable,
  60             unsigned _progressInterval,
  61             unsigned _percentSourceUnaligned,
  62             unsigned _percentDestUnaligned,
  63             Addr _traceAddr,
  64             Counter _max_loads,
  65             bool _atomic);
  66
  67     virtual void init();
  68
  69     // register statistics
  70     virtual void regStats();
  71
  72     inline Tick cycles(int numCycles) const { return numCycles; }
  73
  74     // main simulation loop (one cycle)
  75     void tick();
  76
  77     virtual Port *getPort(const std::string &if_name, int idx = -1);
  78
  79   protected:
  80     class TickEvent : public Event
  81     {
  82       private:
  83         MemTest *cpu;
  84       public:
  85         TickEvent(MemTest *c)
  86             : Event(&mainEventQueue, CPU_Tick_Pri), cpu(c) {}
  87         void process() {cpu->tick();}
  88         virtual const char *description() { return "tick event"; }
  89     };
  90
  91     TickEvent tickEvent;
  92     class CpuPort : public Port
  93     {
  94
  95         MemTest *memtest;
  96
  97       public:
  98
  99         CpuPort(const std::string &_name, MemTest *_memtest)
 100             : Port(_name), memtest(_memtest)
 101         { }
 102
 103       protected:
 104
 105         virtual bool recvTiming(PacketPtr pkt);
 106
 107         virtual Tick recvAtomic(PacketPtr pkt);
 108
 109         virtual void recvFunctional(PacketPtr pkt);
 110
 111         virtual void recvStatusChange(Status status);
 112
 113         virtual void recvRetry();
 114
 115         virtual void getDeviceAddressRanges(AddrRangeList &resp,
 116             AddrRangeList &snoop)
 117         { resp.clear(); snoop.clear(); snoop.push_back(RangeSize(0,-1)); }
 118     };
 119
 120     CpuPort cachePort;
 121     CpuPort funcPort;
 122
 123     class MemTestSenderState : public Packet::SenderState
 124     {
 125       public:
 126         /** Constructor. */
 127         MemTestSenderState(uint8_t *_data)
 128             : data(_data)
 129         { }
 130
 131         // Hold onto data pointer
 132         uint8_t *data;
 133     };
 134
 135 //    Request *dataReq;
 136     PacketPtr retryPkt;
 137 //    MemInterface *cacheInterface;
 138 //    PhysicalMemory *mainMem;
 139 //    PhysicalMemory *checkMem;
 140 //    SimpleThread *thread;
 141
 142     bool accessRetry;
 143
 144     unsigned size;              // size of testing memory region
 145
 146     unsigned percentReads;      // target percentage of read accesses
 147 //    unsigned percentCopies;   // target percentage of copy accesses
 148     unsigned percentUncacheable;
 149
 150     int id;
 151
 152     std::set<unsigned> outstandingAddrs;
 153
 154     unsigned blockSize;
 155
 156     Addr blockAddrMask;
 157
 158     Addr blockAddr(Addr addr)
 159     {
 160         return (addr & ~blockAddrMask);
 161     }
 162
 163     Addr traceBlockAddr;
 164
 165     Addr baseAddr1;             // fix this to option
 166     Addr baseAddr2;             // fix this to option
 167     Addr uncacheAddr;
 168
 169     unsigned progressInterval;  // frequency of progress reports
 170     Tick nextProgressMessage;   // access # for next progress report
 171
 172     unsigned percentSourceUnaligned;
 173     unsigned percentDestUnaligned;
 174
 175     Tick noResponseCycles;
 176
 177     uint64_t numReads;
 178     uint64_t maxLoads;
 179
 180     bool atomic;
 181
 182     Stats::Scalar<> numReadsStat;
 183     Stats::Scalar<> numWritesStat;
 184     Stats::Scalar<> numCopiesStat;
 185
 186     // called by MemCompleteEvent::process()
 187     void completeRequest(PacketPtr pkt);
 188
 189     void sendPkt(PacketPtr pkt);
 190
 191     void doRetry();
 192
 193     friend class MemCompleteEvent;
 194 };
 195
 196 #endif // __CPU_MEMTEST_MEMTEST_HH__
 197
 198
 199