src/cpu/memtest/memtest.hh

   1 /*
   2  * Copyright (c) 2002-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Erik Hallnor
  29  *          Steve Reinhardt
  30  */
  31
  32 #ifndef __CPU_MEMTEST_MEMTEST_HH__
  33 #define __CPU_MEMTEST_MEMTEST_HH__
  34
  35 #include <set>
  36
  37 #include "base/statistics.hh"
  38 #include "sim/eventq.hh"
  39 #include "sim/sim_exit.hh"
  40 #include "sim/sim_object.hh"
  41 #include "sim/stats.hh"
  42 #include "mem/mem_object.hh"
  43 #include "mem/port.hh"
  44
  45 class Packet;
  46 class MemTest : public MemObject
  47 {
  48   public:
  49
  50     MemTest(const std::string &name,
  51             unsigned _memorySize,
  52             unsigned _percentReads,
  53             unsigned _percentFunctional,
  54             unsigned _percentUncacheable,
  55             unsigned _progressInterval,
  56             unsigned _percentSourceUnaligned,
  57             unsigned _percentDestUnaligned,
  58             Addr _traceAddr,
  59             Counter _max_loads,
  60             bool _atomic);
  61
  62     virtual void init();
  63
  64     // register statistics
  65     virtual void regStats();
  66
  67     inline Tick cycles(int numCycles) const { return numCycles; }
  68
  69     // main simulation loop (one cycle)
  70     void tick();
  71
  72     virtual Port *getPort(const std::string &if_name, int idx = -1);
  73
  74   protected:
  75     class TickEvent : public Event
  76     {
  77       private:
  78         MemTest *cpu;
  79       public:
  80         TickEvent(MemTest *c)
  81             : Event(&mainEventQueue, CPU_Tick_Pri), cpu(c) {}
  82         void process() {cpu->tick();}
  83         virtual const char *description() { return "MemTest tick"; }
  84     };
  85
  86     TickEvent tickEvent;
  87
  88     class CpuPort : public Port
  89     {
  90         MemTest *memtest;
  91
  92       public:
  93
  94         CpuPort(const std::string &_name, MemTest *_memtest)
  95             : Port(_name, _memtest), memtest(_memtest)
  96         { }
  97
  98         bool snoopRangeSent;
  99
 100       protected:
 101
 102         virtual bool recvTiming(PacketPtr pkt);
 103
 104         virtual Tick recvAtomic(PacketPtr pkt);
 105
 106         virtual void recvFunctional(PacketPtr pkt);
 107
 108         virtual void recvStatusChange(Status status);
 109
 110         virtual void recvRetry();
 111
 112         virtual void getDeviceAddressRanges(AddrRangeList &resp,
 113                                             bool &snoop)
 114         { resp.clear(); snoop = false; }
 115     };
 116
 117     CpuPort cachePort;
 118     CpuPort funcPort;
 119
 120     bool snoopRangeSent;
 121
 122     class MemTestSenderState : public Packet::SenderState
 123     {
 124       public:
 125         /** Constructor. */
 126         MemTestSenderState(uint8_t *_data)
 127             : data(_data)
 128         { }
 129
 130         // Hold onto data pointer
 131         uint8_t *data;
 132     };
 133
 134     PacketPtr retryPkt;
 135
 136     bool accessRetry;
 137
 138     unsigned size;              // size of testing memory region
 139
 140     unsigned percentReads;      // target percentage of read accesses
 141     unsigned percentFunctional; // target percentage of functional accesses
 142     unsigned percentUncacheable;
 143
 144     int id;
 145
 146     std::set<unsigned> outstandingAddrs;
 147
 148     unsigned blockSize;
 149
 150     Addr blockAddrMask;
 151
 152     Addr blockAddr(Addr addr)
 153     {
 154         return (addr & ~blockAddrMask);
 155     }
 156
 157     Addr traceBlockAddr;
 158
 159     Addr baseAddr1;             // fix this to option
 160     Addr baseAddr2;             // fix this to option
 161     Addr uncacheAddr;
 162
 163     unsigned progressInterval;  // frequency of progress reports
 164     Tick nextProgressMessage;   // access # for next progress report
 165
 166     unsigned percentSourceUnaligned;
 167     unsigned percentDestUnaligned;
 168
 169     Tick noResponseCycles;
 170
 171     uint64_t numReads;
 172     uint64_t maxLoads;
 173
 174     bool atomic;
 175
 176     Stats::Scalar<> numReadsStat;
 177     Stats::Scalar<> numWritesStat;
 178     Stats::Scalar<> numCopiesStat;
 179
 180     // called by MemCompleteEvent::process()
 181     void completeRequest(PacketPtr pkt);
 182
 183     void sendPkt(PacketPtr pkt);
 184
 185     void doRetry();
 186
 187     friend class MemCompleteEvent;
 188 };
 189
 190 #endif // __CPU_MEMTEST_MEMTEST_HH__
 191
 192
 193