src/cpu/o3/O3CPU.py

   1 # Copyright (c) 2005-2007 The Regents of The University of Michigan
   2 # All rights reserved.
   3 #
   4 # Redistribution and use in source and binary forms, with or without
   5 # modification, are permitted provided that the following conditions are
   6 # met: redistributions of source code must retain the above copyright
   7 # notice, this list of conditions and the following disclaimer;
   8 # redistributions in binary form must reproduce the above copyright
   9 # notice, this list of conditions and the following disclaimer in the
  10 # documentation and/or other materials provided with the distribution;
  11 # neither the name of the copyright holders nor the names of its
  12 # contributors may be used to endorse or promote products derived from
  13 # this software without specific prior written permission.
  14 #
  15 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  16 # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  17 # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  18 # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  19 # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  20 # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  21 # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  22 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  23 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  24 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  25 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  26 #
  27 # Authors: Kevin Lim
  28
  29 from m5.defines import buildEnv
  30 from m5.params import *
  31 from m5.proxy import *
  32 from BaseCPU import BaseCPU
  33 from FUPool import *
  34
  35 if buildEnv['USE_CHECKER']:
  36     from O3Checker import O3Checker
  37
  38 class DerivO3CPU(BaseCPU):
  39     type = 'DerivO3CPU'
  40     activity = Param.Unsigned(0, "Initial count")
  41
  42     if buildEnv['USE_CHECKER']:
  43         # FIXME: Shouldn't need to derefernce Parent.workload
  44         #        Somewhere in the param parsing code
  45         #        src/python/m5/params.py is and error that
  46         #        has trouble converting the workload parameter properly.
  47         checker = Param.BaseCPU(O3Checker(workload=Parent.workload[0],
  48                                           exitOnError=False,
  49                                           updateOnError=True,
  50                                           warnOnlyOnLoadError=True),
  51                                           "checker")
  52         checker.itb = Parent.itb
  53         checker.dtb = Parent.dtb
  54
  55     cachePorts = Param.Unsigned(200, "Cache Ports")
  56
  57     decodeToFetchDelay = Param.Unsigned(1, "Decode to fetch delay")
  58     renameToFetchDelay = Param.Unsigned(1 ,"Rename to fetch delay")
  59     iewToFetchDelay = Param.Unsigned(1, "Issue/Execute/Writeback to fetch "
  60                                      "delay")
  61     commitToFetchDelay = Param.Unsigned(1, "Commit to fetch delay")
  62     fetchWidth = Param.Unsigned(8, "Fetch width")
  63
  64     renameToDecodeDelay = Param.Unsigned(1, "Rename to decode delay")
  65     iewToDecodeDelay = Param.Unsigned(1, "Issue/Execute/Writeback to decode "
  66                "delay")
  67     commitToDecodeDelay = Param.Unsigned(1, "Commit to decode delay")
  68     fetchToDecodeDelay = Param.Unsigned(1, "Fetch to decode delay")
  69     decodeWidth = Param.Unsigned(8, "Decode width")
  70
  71     iewToRenameDelay = Param.Unsigned(1, "Issue/Execute/Writeback to rename "
  72                "delay")
  73     commitToRenameDelay = Param.Unsigned(1, "Commit to rename delay")
  74     decodeToRenameDelay = Param.Unsigned(1, "Decode to rename delay")
  75     renameWidth = Param.Unsigned(8, "Rename width")
  76
  77     commitToIEWDelay = Param.Unsigned(1, "Commit to "
  78                "Issue/Execute/Writeback delay")
  79     renameToIEWDelay = Param.Unsigned(2, "Rename to "
  80                "Issue/Execute/Writeback delay")
  81     issueToExecuteDelay = Param.Unsigned(1, "Issue to execute delay (internal "
  82               "to the IEW stage)")
  83     dispatchWidth = Param.Unsigned(8, "Dispatch width")
  84     issueWidth = Param.Unsigned(8, "Issue width")
  85     wbWidth = Param.Unsigned(8, "Writeback width")
  86     wbDepth = Param.Unsigned(1, "Writeback depth")
  87     fuPool = Param.FUPool(DefaultFUPool(), "Functional Unit pool")
  88
  89     iewToCommitDelay = Param.Unsigned(1, "Issue/Execute/Writeback to commit "
  90                "delay")
  91     renameToROBDelay = Param.Unsigned(1, "Rename to reorder buffer delay")
  92     commitWidth = Param.Unsigned(8, "Commit width")
  93     squashWidth = Param.Unsigned(8, "Squash width")
  94     trapLatency = Param.Tick(13, "Trap latency")
  95     fetchTrapLatency = Param.Tick(1, "Fetch trap latency")
  96
  97     backComSize = Param.Unsigned(5, "Time buffer size for backwards communication")
  98     forwardComSize = Param.Unsigned(5, "Time buffer size for forward communication")
  99
 100     predType = Param.String("tournament", "Branch predictor type ('local', 'tournament')")
 101     localPredictorSize = Param.Unsigned(2048, "Size of local predictor")
 102     localCtrBits = Param.Unsigned(2, "Bits per counter")
 103     localHistoryTableSize = Param.Unsigned(2048, "Size of local history table")
 104     localHistoryBits = Param.Unsigned(11, "Bits for the local history")
 105     globalPredictorSize = Param.Unsigned(8192, "Size of global predictor")
 106     globalCtrBits = Param.Unsigned(2, "Bits per counter")
 107     globalHistoryBits = Param.Unsigned(13, "Bits of history")
 108     choicePredictorSize = Param.Unsigned(8192, "Size of choice predictor")
 109     choiceCtrBits = Param.Unsigned(2, "Bits of choice counters")
 110
 111     BTBEntries = Param.Unsigned(4096, "Number of BTB entries")
 112     BTBTagSize = Param.Unsigned(16, "Size of the BTB tags, in bits")
 113
 114     RASSize = Param.Unsigned(16, "RAS size")
 115
 116     LQEntries = Param.Unsigned(32, "Number of load queue entries")
 117     SQEntries = Param.Unsigned(32, "Number of store queue entries")
 118     LSQDepCheckShift = Param.Unsigned(4, "Number of places to shift addr before check")
 119     LSQCheckLoads = Param.Bool(True,
 120         "Should dependency violations be checked for loads & stores or just stores")
 121     store_set_clear_period = Param.Unsigned(250000,
 122             "Number of load/store insts before the dep predictor should be invalidated")
 123     LFSTSize = Param.Unsigned(1024, "Last fetched store table size")
 124     SSITSize = Param.Unsigned(1024, "Store set ID table size")
 125
 126     numRobs = Param.Unsigned(1, "Number of Reorder Buffers");
 127
 128     numPhysIntRegs = Param.Unsigned(256, "Number of physical integer registers")
 129     numPhysFloatRegs = Param.Unsigned(256, "Number of physical floating point "
 130                                       "registers")
 131     numIQEntries = Param.Unsigned(64, "Number of instruction queue entries")
 132     numROBEntries = Param.Unsigned(192, "Number of reorder buffer entries")
 133
 134     instShiftAmt = Param.Unsigned(2, "Number of bits to shift instructions by")
 135
 136     smtNumFetchingThreads = Param.Unsigned(1, "SMT Number of Fetching Threads")
 137     smtFetchPolicy = Param.String('SingleThread', "SMT Fetch policy")
 138     smtLSQPolicy    = Param.String('Partitioned', "SMT LSQ Sharing Policy")
 139     smtLSQThreshold = Param.Int(100, "SMT LSQ Threshold Sharing Parameter")
 140     smtIQPolicy    = Param.String('Partitioned', "SMT IQ Sharing Policy")
 141     smtIQThreshold = Param.Int(100, "SMT IQ Threshold Sharing Parameter")
 142     smtROBPolicy   = Param.String('Partitioned', "SMT ROB Sharing Policy")
 143     smtROBThreshold = Param.Int(100, "SMT ROB Threshold Sharing Parameter")
 144     smtCommitPolicy = Param.String('RoundRobin', "SMT Commit Policy")
 145
 146     needsTSO = Param.Bool(buildEnv['TARGET_ISA'] == 'x86',
 147                           "Enable TSO Memory model")