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42 #ifndef __CPU_O3_FREE_LIST_HH__
43 #define __CPU_O3_FREE_LIST_HH__
49 #include "base/logging.hh"
50 #include "base/trace.hh"
51 #include "cpu/o3/comm.hh"
52 #include "cpu/o3/regfile.hh"
53 #include "debug/FreeList.hh"
56 * Free list for a single class of registers (e.g., integer
57 * or floating point). Because the register class is implicitly
58 * determined by the rename map instance being accessed, all
59 * architectural register index parameters and values in this class
60 * are relative (e.g., %fp2 is just index 2).
66 /** The actual free list */
67 std::queue<PhysRegIdPtr> freeRegs;
73 /** Add a physical register to the free list */
74 void addReg(PhysRegIdPtr reg) { freeRegs.push(reg); }
76 /** Add physical registers to the free list */
77 template<class InputIt>
79 addRegs(InputIt first, InputIt last) {
80 std::for_each(first, last, [this](typename InputIt::value_type& reg) {
81 this->freeRegs.push(®);
85 /** Get the next available register from the free list */
88 assert(!freeRegs.empty());
89 PhysRegIdPtr free_reg = freeRegs.front();
94 /** Return the number of free registers on the list. */
95 unsigned numFreeRegs() const { return freeRegs.size(); }
97 /** True iff there are free registers on the list. */
98 bool hasFreeRegs() const { return !freeRegs.empty(); }
103 * FreeList class that simply holds the list of free integer and floating
104 * point registers. Can request for a free register of either type, and
105 * also send back free registers of either type. This is a very simple
106 * class, but it should be sufficient for most implementations. Like all
107 * other classes, it assumes that the indices for the floating point
108 * registers starts after the integer registers end. Hence the variable
109 * numPhysicalIntRegs is logically equivalent to the baseFP dependency.
110 * Note that while this most likely should be called FreeList, the name
111 * "FreeList" is used in a typedef within the CPU Policy, and therefore no
112 * class can be named simply "FreeList".
113 * @todo: Give a better name to the base FP dependency.
115 class UnifiedFreeList
119 /** The object name, for DPRINTF. We have to declare this
120 * explicitly because Scoreboard is not a SimObject. */
121 const std::string _name;
123 /** The list of free integer registers. */
124 SimpleFreeList intList;
126 /** The list of free floating point registers. */
127 SimpleFreeList floatList;
129 /** The following two are exclusive interfaces. */
131 /** The list of free vector registers. */
132 SimpleFreeList vecList;
134 /** The list of free vector element registers. */
135 SimpleFreeList vecElemList;
138 /** The list of free predicate registers. */
139 SimpleFreeList predList;
141 /** The list of free condition-code registers. */
142 SimpleFreeList ccList;
145 * The register file object is used only to distinguish integer
146 * from floating-point physical register indices.
148 PhysRegFile *regFile;
151 * We give UnifiedRenameMap internal access so it can get at the
152 * internal per-class free lists and associate those with its
153 * per-class rename maps. See UnifiedRenameMap::init().
155 friend class UnifiedRenameMap;
158 /** Constructs a free list.
159 * @param _numPhysicalIntRegs Number of physical integer registers.
160 * @param reservedIntRegs Number of integer registers already
161 * used by initial mappings.
162 * @param _numPhysicalFloatRegs Number of physical fp registers.
163 * @param reservedFloatRegs Number of fp registers already
164 * used by initial mappings.
166 UnifiedFreeList(const std::string &_my_name, PhysRegFile *_regFile);
168 /** Gives the name of the freelist. */
169 std::string name() const { return _name; };
171 /** Returns a pointer to the condition-code free list */
172 SimpleFreeList *getCCList() { return &ccList; }
174 /** Gets a free integer register. */
175 PhysRegIdPtr getIntReg() { return intList.getReg(); }
177 /** Gets a free fp register. */
178 PhysRegIdPtr getFloatReg() { return floatList.getReg(); }
180 /** Gets a free vector register. */
181 PhysRegIdPtr getVecReg() { return vecList.getReg(); }
183 /** Gets a free vector elemenet register. */
184 PhysRegIdPtr getVecElem() { return vecElemList.getReg(); }
186 /** Gets a free predicate register. */
187 PhysRegIdPtr getVecPredReg() { return predList.getReg(); }
189 /** Gets a free cc register. */
190 PhysRegIdPtr getCCReg() { return ccList.getReg(); }
192 /** Adds a register back to the free list. */
193 void addReg(PhysRegIdPtr freed_reg);
195 /** Adds a register back to the free list. */
196 template<class InputIt>
197 void addRegs(InputIt first, InputIt last);
199 /** Adds an integer register back to the free list. */
200 void addIntReg(PhysRegIdPtr freed_reg) { intList.addReg(freed_reg); }
202 /** Adds a fp register back to the free list. */
203 void addFloatReg(PhysRegIdPtr freed_reg) { floatList.addReg(freed_reg); }
205 /** Adds a vector register back to the free list. */
206 void addVecReg(PhysRegIdPtr freed_reg) { vecList.addReg(freed_reg); }
208 /** Adds a vector element register back to the free list. */
209 void addVecElem(PhysRegIdPtr freed_reg) {
210 vecElemList.addReg(freed_reg);
213 /** Adds a predicate register back to the free list. */
214 void addVecPredReg(PhysRegIdPtr freed_reg) { predList.addReg(freed_reg); }
216 /** Adds a cc register back to the free list. */
217 void addCCReg(PhysRegIdPtr freed_reg) { ccList.addReg(freed_reg); }
219 /** Checks if there are any free integer registers. */
220 bool hasFreeIntRegs() const { return intList.hasFreeRegs(); }
222 /** Checks if there are any free fp registers. */
223 bool hasFreeFloatRegs() const { return floatList.hasFreeRegs(); }
225 /** Checks if there are any free vector registers. */
226 bool hasFreeVecRegs() const { return vecList.hasFreeRegs(); }
228 /** Checks if there are any free vector registers. */
229 bool hasFreeVecElems() const { return vecElemList.hasFreeRegs(); }
231 /** Checks if there are any free predicate registers. */
232 bool hasFreeVecPredRegs() const { return predList.hasFreeRegs(); }
234 /** Checks if there are any free cc registers. */
235 bool hasFreeCCRegs() const { return ccList.hasFreeRegs(); }
237 /** Returns the number of free integer registers. */
238 unsigned numFreeIntRegs() const { return intList.numFreeRegs(); }
240 /** Returns the number of free fp registers. */
241 unsigned numFreeFloatRegs() const { return floatList.numFreeRegs(); }
243 /** Returns the number of free vector registers. */
244 unsigned numFreeVecRegs() const { return vecList.numFreeRegs(); }
246 /** Returns the number of free vector registers. */
247 unsigned numFreeVecElems() const { return vecElemList.numFreeRegs(); }
249 /** Returns the number of free predicate registers. */
250 unsigned numFreeVecPredRegs() const { return predList.numFreeRegs(); }
252 /** Returns the number of free cc registers. */
253 unsigned numFreeCCRegs() const { return ccList.numFreeRegs(); }
256 template<class InputIt>
258 UnifiedFreeList::addRegs(InputIt first, InputIt last)
260 // Are there any registers to add?
264 panic_if((first != last) &&
265 first->classValue() != (last-1)->classValue(),
266 "Attempt to add mixed type regs: %s and %s",
268 (last-1)->className());
269 switch (first->classValue()) {
271 intList.addRegs(first, last);
274 floatList.addRegs(first, last);
277 vecList.addRegs(first, last);
280 vecElemList.addRegs(first, last);
282 case VecPredRegClass:
283 predList.addRegs(first, last);
286 ccList.addRegs(first, last);
289 panic("Unexpected RegClass (%s)",
296 UnifiedFreeList::addReg(PhysRegIdPtr freed_reg)
298 DPRINTF(FreeList,"Freeing register %i (%s).\n", freed_reg->index(),
299 freed_reg->className());
300 //Might want to add in a check for whether or not this register is
301 //already in there. A bit vector or something similar would be useful.
302 switch (freed_reg->classValue()) {
304 intList.addReg(freed_reg);
307 floatList.addReg(freed_reg);
310 vecList.addReg(freed_reg);
313 vecElemList.addReg(freed_reg);
315 case VecPredRegClass:
316 predList.addReg(freed_reg);
319 ccList.addReg(freed_reg);
322 panic("Unexpected RegClass (%s)",
323 freed_reg->className());
326 // These assert conditions ensure that the number of free
327 // registers are not more than the # of total Physical Registers.
328 // If this were false, it would mean that registers
329 // have been freed twice, overflowing the free register
330 // pool and potentially crashing SMT workloads.
332 // Comment out for now so as to not potentially break
333 // CMP and single-threaded workloads
335 // assert(freeIntRegs.size() <= numPhysicalIntRegs);
336 // assert(freeFloatRegs.size() <= numPhysicalFloatRegs);
340 #endif // __CPU_O3_FREE_LIST_HH__