src/cpu/o3/free_list.hh

   1 /*
   2  * Copyright (c) 2004-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Kevin Lim
  29  */
  30
  31 #ifndef __CPU_O3_FREE_LIST_HH__
  32 #define __CPU_O3_FREE_LIST_HH__
  33
  34 #include <iostream>
  35 #include <queue>
  36
  37 #include "arch/registers.hh"
  38 #include "base/misc.hh"
  39 #include "base/trace.hh"
  40 #include "config/the_isa.hh"
  41 #include "cpu/o3/comm.hh"
  42 #include "debug/FreeList.hh"
  43
  44 /**
  45  * FreeList class that simply holds the list of free integer and floating
  46  * point registers.  Can request for a free register of either type, and
  47  * also send back free registers of either type.  This is a very simple
  48  * class, but it should be sufficient for most implementations.  Like all
  49  * other classes, it assumes that the indices for the floating point
  50  * registers starts after the integer registers end.  Hence the variable
  51  * numPhysicalIntRegs is logically equivalent to the baseFP dependency.
  52  * Note that while this most likely should be called FreeList, the name
  53  * "FreeList" is used in a typedef within the CPU Policy, and therefore no
  54  * class can be named simply "FreeList".
  55  * @todo: Give a better name to the base FP dependency.
  56  */
  57 class SimpleFreeList
  58 {
  59   private:
  60     /** The list of free integer registers. */
  61     std::queue<PhysRegIndex> freeIntRegs;
  62
  63     /** The list of free floating point registers. */
  64     std::queue<PhysRegIndex> freeFloatRegs;
  65
  66     /** Number of logical integer registers. */
  67     int numLogicalIntRegs;
  68
  69     /** Number of physical integer registers. */
  70     int numPhysicalIntRegs;
  71
  72     /** Number of logical floating point registers. */
  73     int numLogicalFloatRegs;
  74
  75     /** Number of physical floating point registers. */
  76     int numPhysicalFloatRegs;
  77
  78     /** Total number of physical registers. */
  79     int numPhysicalRegs;
  80
  81   public:
  82     /** Constructs a free list.
  83      *  @param activeThreads Number of active threads.
  84      *  @param _numLogicalIntRegs Number of logical integer registers.
  85      *  @param _numPhysicalIntRegs Number of physical integer registers.
  86      *  @param _numLogicalFloatRegs Number of logical fp registers.
  87      *  @param _numPhysicalFloatRegs Number of physical fp registers.
  88      */
  89     SimpleFreeList(ThreadID activeThreads,
  90                    unsigned _numLogicalIntRegs,
  91                    unsigned _numPhysicalIntRegs,
  92                    unsigned _numLogicalFloatRegs,
  93                    unsigned _numPhysicalFloatRegs);
  94
  95     /** Gives the name of the freelist. */
  96     std::string name() const;
  97
  98     /** Gets a free integer register. */
  99     inline PhysRegIndex getIntReg();
 100
 101     /** Gets a free fp register. */
 102     inline PhysRegIndex getFloatReg();
 103
 104     /** Adds a register back to the free list. */
 105     inline void addReg(PhysRegIndex freed_reg);
 106
 107     /** Adds an integer register back to the free list. */
 108     inline void addIntReg(PhysRegIndex freed_reg);
 109
 110     /** Adds a fp register back to the free list. */
 111     inline void addFloatReg(PhysRegIndex freed_reg);
 112
 113     /** Checks if there are any free integer registers. */
 114     bool hasFreeIntRegs()
 115     { return !freeIntRegs.empty(); }
 116
 117     /** Checks if there are any free fp registers. */
 118     bool hasFreeFloatRegs()
 119     { return !freeFloatRegs.empty(); }
 120
 121     /** Returns the number of free integer registers. */
 122     int numFreeIntRegs()
 123     { return freeIntRegs.size(); }
 124
 125     /** Returns the number of free fp registers. */
 126     int numFreeFloatRegs()
 127     { return freeFloatRegs.size(); }
 128 };
 129
 130 inline PhysRegIndex
 131 SimpleFreeList::getIntReg()
 132 {
 133     DPRINTF(FreeList, "Trying to get free integer register.\n");
 134
 135     if (freeIntRegs.empty()) {
 136         panic("No free integer registers!");
 137     }
 138
 139     PhysRegIndex free_reg = freeIntRegs.front();
 140
 141     freeIntRegs.pop();
 142
 143     return(free_reg);
 144 }
 145
 146 inline PhysRegIndex
 147 SimpleFreeList::getFloatReg()
 148 {
 149     DPRINTF(FreeList, "Trying to get free float register.\n");
 150
 151     if (freeFloatRegs.empty()) {
 152         panic("No free integer registers!");
 153     }
 154
 155     PhysRegIndex free_reg = freeFloatRegs.front();
 156
 157     freeFloatRegs.pop();
 158
 159     return(free_reg);
 160 }
 161
 162 inline void
 163 SimpleFreeList::addReg(PhysRegIndex freed_reg)
 164 {
 165     DPRINTF(FreeList,"Freeing register %i.\n", freed_reg);
 166     //Might want to add in a check for whether or not this register is
 167     //already in there.  A bit vector or something similar would be useful.
 168     if (freed_reg < numPhysicalIntRegs) {
 169         if (freed_reg != TheISA::ZeroReg)
 170             freeIntRegs.push(freed_reg);
 171     } else if (freed_reg < numPhysicalRegs) {
 172 #if THE_ISA == ALPHA_ISA
 173         if (freed_reg != (TheISA::ZeroReg + numPhysicalIntRegs))
 174 #endif
 175             freeFloatRegs.push(freed_reg);
 176     }
 177
 178     // These assert conditions ensure that the number of free
 179     // registers are not more than the # of total Physical  Registers.
 180     // If this were false, it would mean that registers
 181     // have been freed twice, overflowing the free register
 182     // pool and potentially crashing SMT workloads.
 183     // ----
 184     // Comment out for now so as to not potentially break
 185     // CMP and single-threaded workloads
 186     // ----
 187     // assert(freeIntRegs.size() <= numPhysicalIntRegs);
 188     // assert(freeFloatRegs.size() <= numPhysicalFloatRegs);
 189 }
 190
 191 inline void
 192 SimpleFreeList::addIntReg(PhysRegIndex freed_reg)
 193 {
 194     DPRINTF(FreeList,"Freeing int register %i.\n", freed_reg);
 195
 196     freeIntRegs.push(freed_reg);
 197 }
 198
 199 inline void
 200 SimpleFreeList::addFloatReg(PhysRegIndex freed_reg)
 201 {
 202     DPRINTF(FreeList,"Freeing float register %i.\n", freed_reg);
 203
 204     freeFloatRegs.push(freed_reg);
 205 }
 206
 207 #endif // __CPU_O3_FREE_LIST_HH__