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3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
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15 * Copyright (c) 2004-2006 The Regents of The University of Michigan
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41 * Authors: Korey Sewell
44 #ifndef __CPU_O3_LSQ_HH__
45 #define __CPU_O3_LSQ_HH__
50 #include "cpu/o3/lsq_unit.hh"
51 #include "cpu/inst_seq.hh"
52 #include "mem/port.hh"
53 #include "sim/sim_object.hh"
55 struct DerivO3CPUParams;
60 typedef typename Impl::O3CPU O3CPU;
61 typedef typename Impl::DynInstPtr DynInstPtr;
62 typedef typename Impl::CPUPol::IEW IEW;
63 typedef typename Impl::CPUPol::LSQUnit LSQUnit;
72 /** Constructs an LSQ with the given parameters. */
73 LSQ(O3CPU *cpu_ptr, IEW *iew_ptr, DerivO3CPUParams *params);
75 if (thread) delete [] thread;
78 /** Returns the name of the LSQ. */
79 std::string name() const;
81 /** Registers statistics of each LSQ unit. */
84 /** Sets the pointer to the list of active threads. */
85 void setActiveThreads(std::list<ThreadID> *at_ptr);
87 /** Perform sanity checks after a drain. */
88 void drainSanityCheck() const;
89 /** Has the LSQ drained? */
90 bool isDrained() const;
91 /** Takes over execution from another CPU's thread. */
94 /** Number of entries needed for the given amount of threads.*/
95 int entryAmount(ThreadID num_threads);
96 void removeEntries(ThreadID tid);
97 /** Reset the max entries for each thread. */
99 /** Resize the max entries for a thread. */
100 void resizeEntries(unsigned size, ThreadID tid);
102 /** Ticks the LSQ. */
104 /** Ticks a specific LSQ Unit. */
105 void tick(ThreadID tid)
106 { thread[tid].tick(); }
108 /** Inserts a load into the LSQ. */
109 void insertLoad(const DynInstPtr &load_inst);
110 /** Inserts a store into the LSQ. */
111 void insertStore(const DynInstPtr &store_inst);
113 /** Executes a load. */
114 Fault executeLoad(const DynInstPtr &inst);
116 /** Executes a store. */
117 Fault executeStore(const DynInstPtr &inst);
120 * Commits loads up until the given sequence number for a specific thread.
122 void commitLoads(InstSeqNum &youngest_inst, ThreadID tid)
123 { thread[tid].commitLoads(youngest_inst); }
126 * Commits stores up until the given sequence number for a specific thread.
128 void commitStores(InstSeqNum &youngest_inst, ThreadID tid)
129 { thread[tid].commitStores(youngest_inst); }
132 * Attempts to write back stores until all cache ports are used or the
133 * interface becomes blocked.
135 void writebackStores();
136 /** Same as above, but only for one thread. */
137 void writebackStores(ThreadID tid);
140 * Squash instructions from a thread until the specified sequence number.
142 void squash(const InstSeqNum &squashed_num, ThreadID tid)
143 { thread[tid].squash(squashed_num); }
145 /** Returns whether or not there was a memory ordering violation. */
148 * Returns whether or not there was a memory ordering violation for a
151 bool violation(ThreadID tid)
152 { return thread[tid].violation(); }
154 /** Gets the instruction that caused the memory ordering violation. */
155 DynInstPtr getMemDepViolator(ThreadID tid)
156 { return thread[tid].getMemDepViolator(); }
158 /** Returns the head index of the load queue for a specific thread. */
159 int getLoadHead(ThreadID tid)
160 { return thread[tid].getLoadHead(); }
162 /** Returns the sequence number of the head of the load queue. */
163 InstSeqNum getLoadHeadSeqNum(ThreadID tid)
165 return thread[tid].getLoadHeadSeqNum();
168 /** Returns the head index of the store queue. */
169 int getStoreHead(ThreadID tid)
170 { return thread[tid].getStoreHead(); }
172 /** Returns the sequence number of the head of the store queue. */
173 InstSeqNum getStoreHeadSeqNum(ThreadID tid)
175 return thread[tid].getStoreHeadSeqNum();
178 /** Returns the number of instructions in all of the queues. */
180 /** Returns the number of instructions in the queues of one thread. */
181 int getCount(ThreadID tid)
182 { return thread[tid].getCount(); }
184 /** Returns the total number of loads in the load queue. */
186 /** Returns the total number of loads for a single thread. */
187 int numLoads(ThreadID tid)
188 { return thread[tid].numLoads(); }
190 /** Returns the total number of stores in the store queue. */
192 /** Returns the total number of stores for a single thread. */
193 int numStores(ThreadID tid)
194 { return thread[tid].numStores(); }
196 /** Returns the number of free load entries. */
197 unsigned numFreeLoadEntries();
199 /** Returns the number of free store entries. */
200 unsigned numFreeStoreEntries();
202 /** Returns the number of free entries for a specific thread. */
203 unsigned numFreeEntries(ThreadID tid);
205 /** Returns the number of free entries in the LQ for a specific thread. */
206 unsigned numFreeLoadEntries(ThreadID tid);
208 /** Returns the number of free entries in the SQ for a specific thread. */
209 unsigned numFreeStoreEntries(ThreadID tid);
211 /** Returns if the LSQ is full (either LQ or SQ is full). */
214 * Returns if the LSQ is full for a specific thread (either LQ or SQ is
217 bool isFull(ThreadID tid);
219 /** Returns if the LSQ is empty (both LQ and SQ are empty). */
220 bool isEmpty() const;
221 /** Returns if all of the LQs are empty. */
222 bool lqEmpty() const;
223 /** Returns if all of the SQs are empty. */
224 bool sqEmpty() const;
226 /** Returns if any of the LQs are full. */
228 /** Returns if the LQ of a given thread is full. */
229 bool lqFull(ThreadID tid);
231 /** Returns if any of the SQs are full. */
233 /** Returns if the SQ of a given thread is full. */
234 bool sqFull(ThreadID tid);
237 * Returns if the LSQ is stalled due to a memory operation that must be
242 * Returns if the LSQ of a specific thread is stalled due to a memory
243 * operation that must be replayed.
245 bool isStalled(ThreadID tid);
247 /** Returns whether or not there are any stores to write back to memory. */
248 bool hasStoresToWB();
250 /** Returns whether or not a specific thread has any stores to write back
253 bool hasStoresToWB(ThreadID tid)
254 { return thread[tid].hasStoresToWB(); }
256 /** Returns the number of stores a specific thread has to write back. */
257 int numStoresToWB(ThreadID tid)
258 { return thread[tid].numStoresToWB(); }
260 /** Returns if the LSQ will write back to memory this cycle. */
262 /** Returns if the LSQ of a specific thread will write back to memory this
265 bool willWB(ThreadID tid)
266 { return thread[tid].willWB(); }
268 /** Debugging function to print out all instructions. */
269 void dumpInsts() const;
270 /** Debugging function to print out instructions from a specific thread. */
271 void dumpInsts(ThreadID tid) const
272 { thread[tid].dumpInsts(); }
274 /** Executes a read operation, using the load specified at the load
277 Fault read(const RequestPtr &req,
278 RequestPtr &sreqLow, RequestPtr &sreqHigh,
281 /** Executes a store operation, using the store specified at the store
284 Fault write(const RequestPtr &req,
285 const RequestPtr &sreqLow, const RequestPtr &sreqHigh,
286 uint8_t *data, int store_idx);
289 * Retry the previous send that failed.
294 * Handles writing back and completing the load or store that has
295 * returned from memory.
297 * @param pkt Response packet from the memory sub-system
299 bool recvTimingResp(PacketPtr pkt);
301 void recvTimingSnoopReq(PacketPtr pkt);
303 /** The CPU pointer. */
306 /** The IEW stage pointer. */
310 /** The LSQ policy for SMT mode. */
313 /** The LSQ units for individual threads. */
316 /** List of Active Threads in System. */
317 std::list<ThreadID> *activeThreads;
319 /** Total Size of LQ Entries. */
321 /** Total Size of SQ Entries. */
324 /** Max LQ Size - Used to Enforce Sharing Policies. */
325 unsigned maxLQEntries;
327 /** Max SQ Size - Used to Enforce Sharing Policies. */
328 unsigned maxSQEntries;
330 /** Number of Threads. */
334 template <class Impl>
336 LSQ<Impl>::read(const RequestPtr &req,
337 RequestPtr &sreqLow, RequestPtr &sreqHigh,
340 ThreadID tid = cpu->contextToThread(req->contextId());
342 return thread[tid].read(req, sreqLow, sreqHigh, load_idx);
345 template <class Impl>
347 LSQ<Impl>::write(const RequestPtr &req,
348 const RequestPtr &sreqLow, const RequestPtr &sreqHigh,
349 uint8_t *data, int store_idx)
351 ThreadID tid = cpu->contextToThread(req->contextId());
353 return thread[tid].write(req, sreqLow, sreqHigh, data, store_idx);
356 #endif // __CPU_O3_LSQ_HH__