src/cpu/o3/mips/impl.hh

   1 /*
   2  * Copyright (c) 2006 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Kevin Lim
  29  *          Korey Sewell
  30  */
  31
  32 #ifndef __CPU_O3_MIPS_IMPL_HH__
  33 #define __CPU_O3_MIPS_IMPL_HH__
  34
  35 #include "arch/mips/isa_traits.hh"
  36
  37 #include "cpu/o3/mips/params.hh"
  38 #include "cpu/o3/cpu_policy.hh"
  39
  40
  41 // Forward declarations.
  42 template <class Impl>
  43 class MipsDynInst;
  44
  45 template <class Impl>
  46 class MipsO3CPU;
  47
  48 /** Implementation specific struct that defines several key types to the
  49  *  CPU, the stages within the CPU, the time buffers, and the DynInst.
  50  *  The struct defines the ISA, the CPU policy, the specific DynInst, the
  51  *  specific O3CPU, and all of the structs from the time buffers to do
  52  *  communication.
  53  *  This is one of the key things that must be defined for each hardware
  54  *  specific CPU implementation.
  55  */
  56 struct MipsSimpleImpl
  57 {
  58     /** The type of MachInst. */
  59     typedef TheISA::MachInst MachInst;
  60
  61     /** The CPU policy to be used, which defines all of the CPU stages. */
  62     typedef SimpleCPUPolicy<MipsSimpleImpl> CPUPol;
  63
  64     /** The DynInst type to be used. */
  65     typedef MipsDynInst<MipsSimpleImpl> DynInst;
  66
  67     /** The refcounted DynInst pointer to be used.  In most cases this is
  68      *  what should be used, and not DynInst *.
  69      */
  70     typedef RefCountingPtr<DynInst> DynInstPtr;
  71
  72     /** The O3CPU type to be used. */
  73     typedef MipsO3CPU<MipsSimpleImpl> O3CPU;
  74
  75     /** Same typedef, but for CPUType.  BaseDynInst may not always use
  76      * an O3 CPU, so it's clearer to call it CPUType instead in that
  77      * case.
  78      */
  79     typedef O3CPU CPUType;
  80
  81     /** The Params to be passed to each stage. */
  82     typedef MipsSimpleParams Params;
  83
  84     enum {
  85       MaxWidth = 8,
  86       MaxThreads = 4
  87     };
  88 };
  89
  90 /** The O3Impl to be used. */
  91 typedef MipsSimpleImpl O3CPUImpl;
  92
  93 #endif // __CPU_O3_MIPS_IMPL_HH__