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3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
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33 #ifndef __CPU_O3_REGFILE_HH__
34 #define __CPU_O3_REGFILE_HH__
38 #include "arch/isa_traits.hh"
39 #include "arch/kernel_stats.hh"
40 #include "arch/types.hh"
41 #include "base/trace.hh"
42 #include "config/the_isa.hh"
43 #include "cpu/o3/comm.hh"
44 #include "debug/IEW.hh"
46 class UnifiedFreeList;
49 * Simple physical register file class.
55 typedef TheISA::IntReg IntReg;
56 typedef TheISA::FloatReg FloatReg;
57 typedef TheISA::FloatRegBits FloatRegBits;
58 typedef TheISA::CCReg CCReg;
65 /** Integer register file. */
66 std::vector<IntReg> intRegFile;
68 /** Floating point register file. */
69 std::vector<PhysFloatReg> floatRegFile;
71 /** Condition-code register file. */
72 std::vector<CCReg> ccRegFile;
75 * The first floating-point physical register index. The physical
76 * register file has a single continuous index space, with the
77 * initial indices mapping to the integer registers, followed
78 * immediately by the floating-point registers. Thus the first
79 * floating-point index is equal to the number of integer
82 * Note that this internal organizational detail on how physical
83 * register file indices are ordered should *NOT* be exposed
84 * outside of this class. Other classes can use the is*PhysReg()
85 * methods to map from a physical register index to a class
86 * without knowing the internal structure of the index map.
88 unsigned baseFloatRegIndex;
91 * The first condition-code physical register index. The
92 * condition-code registers follow the floating-point registers.
94 unsigned baseCCRegIndex;
96 /** Total number of physical registers. */
97 unsigned totalNumRegs;
101 * Constructs a physical register file with the specified amount of
102 * integer and floating point registers.
104 PhysRegFile(unsigned _numPhysicalIntRegs,
105 unsigned _numPhysicalFloatRegs,
106 unsigned _numPhysicalCCRegs);
109 * Destructor to free resources
113 /** Initialize the free list */
114 void initFreeList(UnifiedFreeList *freeList);
116 /** @return the number of integer physical registers. */
117 unsigned numIntPhysRegs() const { return baseFloatRegIndex; }
119 /** @return the number of floating-point physical registers. */
120 unsigned numFloatPhysRegs() const
121 { return baseCCRegIndex - baseFloatRegIndex; }
123 /** @return the number of condition-code physical registers. */
124 unsigned numCCPhysRegs() const
125 { return totalNumRegs - baseCCRegIndex; }
127 /** @return the total number of physical registers. */
128 unsigned totalNumPhysRegs() const { return totalNumRegs; }
131 * @return true if the specified physical register index
132 * corresponds to an integer physical register.
134 bool isIntPhysReg(PhysRegIndex reg_idx) const
136 return 0 <= reg_idx && reg_idx < baseFloatRegIndex;
140 * @return true if the specified physical register index
141 * corresponds to a floating-point physical register.
143 bool isFloatPhysReg(PhysRegIndex reg_idx) const
145 return (baseFloatRegIndex <= reg_idx && reg_idx < baseCCRegIndex);
149 * Return true if the specified physical register index
150 * corresponds to a condition-code physical register.
152 bool isCCPhysReg(PhysRegIndex reg_idx)
154 return (baseCCRegIndex <= reg_idx && reg_idx < totalNumRegs);
157 /** Reads an integer register. */
158 uint64_t readIntReg(PhysRegIndex reg_idx) const
160 assert(isIntPhysReg(reg_idx));
162 DPRINTF(IEW, "RegFile: Access to int register %i, has data "
163 "%#x\n", int(reg_idx), intRegFile[reg_idx]);
164 return intRegFile[reg_idx];
167 /** Reads a floating point register (double precision). */
168 FloatReg readFloatReg(PhysRegIndex reg_idx) const
170 assert(isFloatPhysReg(reg_idx));
172 // Remove the base Float reg dependency.
173 PhysRegIndex reg_offset = reg_idx - baseFloatRegIndex;
175 DPRINTF(IEW, "RegFile: Access to float register %i, has "
176 "data %#x\n", int(reg_idx), floatRegFile[reg_offset].q);
178 return floatRegFile[reg_offset].d;
181 FloatRegBits readFloatRegBits(PhysRegIndex reg_idx) const
183 assert(isFloatPhysReg(reg_idx));
185 // Remove the base Float reg dependency.
186 PhysRegIndex reg_offset = reg_idx - baseFloatRegIndex;
188 FloatRegBits floatRegBits = floatRegFile[reg_offset].q;
190 DPRINTF(IEW, "RegFile: Access to float register %i as int, "
191 "has data %#x\n", int(reg_idx), (uint64_t)floatRegBits);
196 /** Reads a condition-code register. */
197 CCReg readCCReg(PhysRegIndex reg_idx)
199 assert(isCCPhysReg(reg_idx));
201 // Remove the base CC reg dependency.
202 PhysRegIndex reg_offset = reg_idx - baseCCRegIndex;
204 DPRINTF(IEW, "RegFile: Access to cc register %i, has "
205 "data %#x\n", int(reg_idx), ccRegFile[reg_offset]);
207 return ccRegFile[reg_offset];
210 /** Sets an integer register to the given value. */
211 void setIntReg(PhysRegIndex reg_idx, uint64_t val)
213 assert(isIntPhysReg(reg_idx));
215 DPRINTF(IEW, "RegFile: Setting int register %i to %#x\n",
218 if (reg_idx != TheISA::ZeroReg)
219 intRegFile[reg_idx] = val;
222 /** Sets a double precision floating point register to the given value. */
223 void setFloatReg(PhysRegIndex reg_idx, FloatReg val)
225 assert(isFloatPhysReg(reg_idx));
227 // Remove the base Float reg dependency.
228 PhysRegIndex reg_offset = reg_idx - baseFloatRegIndex;
230 DPRINTF(IEW, "RegFile: Setting float register %i to %#x\n",
231 int(reg_idx), (uint64_t)val);
233 #if THE_ISA == ALPHA_ISA
234 if (reg_offset != TheISA::ZeroReg)
236 floatRegFile[reg_offset].d = val;
239 void setFloatRegBits(PhysRegIndex reg_idx, FloatRegBits val)
241 assert(isFloatPhysReg(reg_idx));
243 // Remove the base Float reg dependency.
244 PhysRegIndex reg_offset = reg_idx - baseFloatRegIndex;
246 DPRINTF(IEW, "RegFile: Setting float register %i to %#x\n",
247 int(reg_idx), (uint64_t)val);
249 floatRegFile[reg_offset].q = val;
252 /** Sets a condition-code register to the given value. */
253 void setCCReg(PhysRegIndex reg_idx, CCReg val)
255 assert(isCCPhysReg(reg_idx));
257 // Remove the base CC reg dependency.
258 PhysRegIndex reg_offset = reg_idx - baseCCRegIndex;
260 DPRINTF(IEW, "RegFile: Setting cc register %i to %#x\n",
261 int(reg_idx), (uint64_t)val);
263 ccRegFile[reg_offset] = val;
268 #endif //__CPU_O3_REGFILE_HH__