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32 #ifndef __CPU_O3_REGFILE_HH__
33 #define __CPU_O3_REGFILE_HH__
35 #include "arch/isa_traits.hh"
36 #include "arch/faults.hh"
37 #include "arch/types.hh"
38 #include "base/trace.hh"
39 #include "config/full_system.hh"
40 #include "cpu/o3/comm.hh"
43 #include "kern/kernel_stats.hh"
50 * Simple physical register file class.
51 * Right now this is specific to Alpha until we decide if/how to make things
52 * generic enough to support other ISAs.
58 typedef TheISA::IntReg IntReg;
59 typedef TheISA::FloatReg FloatReg;
60 typedef TheISA::FloatRegBits FloatRegBits;
61 typedef TheISA::MiscRegFile MiscRegFile;
62 typedef TheISA::MiscReg MiscReg;
69 // Note that most of the definitions of the IntReg, FloatReg, etc. exist
70 // within the Impl/ISA class and not within this PhysRegFile class.
72 // Will make these registers public for now, but they probably should
73 // be private eventually with some accessor functions.
75 typedef typename Impl::FullCPU FullCPU;
78 * Constructs a physical register file with the specified amount of
79 * integer and floating point registers.
81 PhysRegFile(unsigned _numPhysicalIntRegs,
82 unsigned _numPhysicalFloatRegs);
84 //Everything below should be pretty well identical to the normal
85 //register file that exists within AlphaISA class.
86 //The duplication is unfortunate but it's better than having
87 //different ways to access certain registers.
89 //Add these in later when everything else is in place
90 // void serialize(std::ostream &os);
91 // void unserialize(Checkpoint *cp, const std::string §ion);
93 /** Reads an integer register. */
94 uint64_t readIntReg(PhysRegIndex reg_idx)
96 assert(reg_idx < numPhysicalIntRegs);
98 DPRINTF(IEW, "RegFile: Access to int register %i, has data "
99 "%#x\n", int(reg_idx), intRegFile[reg_idx]);
100 return intRegFile[reg_idx];
103 FloatReg readFloatReg(PhysRegIndex reg_idx, int width)
105 // Remove the base Float reg dependency.
106 reg_idx = reg_idx - numPhysicalIntRegs;
108 assert(reg_idx < numPhysicalFloatRegs + numPhysicalIntRegs);
110 FloatReg floatReg = floatRegFile[reg_idx].d;
112 DPRINTF(IEW, "RegFile: Access to %d byte float register %i, has "
113 "data %#x\n", int(reg_idx), floatRegFile[reg_idx].q);
118 /** Reads a floating point register (double precision). */
119 FloatReg readFloatReg(PhysRegIndex reg_idx)
121 // Remove the base Float reg dependency.
122 reg_idx = reg_idx - numPhysicalIntRegs;
124 assert(reg_idx < numPhysicalFloatRegs + numPhysicalIntRegs);
126 FloatReg floatReg = floatRegFile[reg_idx].d;
128 DPRINTF(IEW, "RegFile: Access to float register %i, has "
129 "data %#x\n", int(reg_idx), floatRegFile[reg_idx].q);
134 /** Reads a floating point register as an integer. */
135 FloatRegBits readFloatRegBits(PhysRegIndex reg_idx, int width)
137 // Remove the base Float reg dependency.
138 reg_idx = reg_idx - numPhysicalIntRegs;
140 assert(reg_idx < numPhysicalFloatRegs + numPhysicalIntRegs);
142 FloatRegBits floatRegBits = floatRegFile[reg_idx].q;
144 DPRINTF(IEW, "RegFile: Access to float register %i as int, "
145 "has data %#x\n", int(reg_idx), (uint64_t)floatRegBits);
150 FloatRegBits readFloatRegBits(PhysRegIndex reg_idx)
152 // Remove the base Float reg dependency.
153 reg_idx = reg_idx - numPhysicalIntRegs;
155 assert(reg_idx < numPhysicalFloatRegs + numPhysicalIntRegs);
157 FloatRegBits floatRegBits = floatRegFile[reg_idx].q;
159 DPRINTF(IEW, "RegFile: Access to float register %i as int, "
160 "has data %#x\n", int(reg_idx), (uint64_t)floatRegBits);
165 /** Sets an integer register to the given value. */
166 void setIntReg(PhysRegIndex reg_idx, uint64_t val)
168 assert(reg_idx < numPhysicalIntRegs);
170 DPRINTF(IEW, "RegFile: Setting int register %i to %#x\n",
173 if (reg_idx != TheISA::ZeroReg)
174 intRegFile[reg_idx] = val;
177 /** Sets a single precision floating point register to the given value. */
178 void setFloatReg(PhysRegIndex reg_idx, FloatReg val, int width)
180 // Remove the base Float reg dependency.
181 reg_idx = reg_idx - numPhysicalIntRegs;
183 assert(reg_idx < numPhysicalFloatRegs + numPhysicalIntRegs);
185 DPRINTF(IEW, "RegFile: Setting float register %i to %#x\n",
186 int(reg_idx), (uint64_t)val);
188 if (reg_idx != TheISA::ZeroReg)
189 floatRegFile[reg_idx].d = val;
192 /** Sets a double precision floating point register to the given value. */
193 void setFloatReg(PhysRegIndex reg_idx, FloatReg val)
195 // Remove the base Float reg dependency.
196 reg_idx = reg_idx - numPhysicalIntRegs;
198 assert(reg_idx < numPhysicalFloatRegs + numPhysicalIntRegs);
200 DPRINTF(IEW, "RegFile: Setting float register %i to %#x\n",
201 int(reg_idx), (uint64_t)val);
203 if (reg_idx != TheISA::ZeroReg)
204 floatRegFile[reg_idx].d = val;
207 /** Sets a floating point register to the given integer value. */
208 void setFloatRegBits(PhysRegIndex reg_idx, FloatRegBits val, int width)
210 // Remove the base Float reg dependency.
211 reg_idx = reg_idx - numPhysicalIntRegs;
213 assert(reg_idx < numPhysicalFloatRegs + numPhysicalIntRegs);
215 DPRINTF(IEW, "RegFile: Setting float register %i to %#x\n",
216 int(reg_idx), (uint64_t)val);
218 floatRegFile[reg_idx].q = val;
221 void setFloatRegBits(PhysRegIndex reg_idx, FloatRegBits val)
223 // Remove the base Float reg dependency.
224 reg_idx = reg_idx - numPhysicalIntRegs;
226 assert(reg_idx < numPhysicalFloatRegs + numPhysicalIntRegs);
228 DPRINTF(IEW, "RegFile: Setting float register %i to %#x\n",
229 int(reg_idx), (uint64_t)val);
231 floatRegFile[reg_idx].q = val;
234 MiscReg readMiscReg(int misc_reg, unsigned thread_id)
236 return miscRegs[thread_id].readReg(misc_reg);
239 MiscReg readMiscRegWithEffect(int misc_reg, Fault &fault,
242 return miscRegs[thread_id].readRegWithEffect(misc_reg, fault,
243 cpu->tcBase(thread_id));
246 Fault setMiscReg(int misc_reg, const MiscReg &val, unsigned thread_id)
248 return miscRegs[thread_id].setReg(misc_reg, val);
251 Fault setMiscRegWithEffect(int misc_reg, const MiscReg &val,
254 return miscRegs[thread_id].setRegWithEffect(misc_reg, val,
255 cpu->tcBase(thread_id));
259 int readIntrFlag() { return intrflag; }
260 /** Sets an interrupt flag. */
261 void setIntrFlag(int val) { intrflag = val; }
265 /** (signed) integer register file. */
268 /** Floating point register file. */
269 PhysFloatReg *floatRegFile;
271 /** Miscellaneous register file. */
272 MiscRegFile miscRegs[Impl::MaxThreads];
276 int intrflag; // interrupt flag
284 /** Sets the CPU pointer. */
285 void setCPU(FullCPU *cpu_ptr) { cpu = cpu_ptr; }
287 /** Number of physical integer registers. */
288 unsigned numPhysicalIntRegs;
289 /** Number of physical floating point registers. */
290 unsigned numPhysicalFloatRegs;
293 template <class Impl>
294 PhysRegFile<Impl>::PhysRegFile(unsigned _numPhysicalIntRegs,
295 unsigned _numPhysicalFloatRegs)
296 : numPhysicalIntRegs(_numPhysicalIntRegs),
297 numPhysicalFloatRegs(_numPhysicalFloatRegs)
299 intRegFile = new IntReg[numPhysicalIntRegs];
300 floatRegFile = new PhysFloatReg[numPhysicalFloatRegs];
302 for (int i = 0; i < Impl::MaxThreads; ++i) {
306 memset(intRegFile, 0, sizeof(IntReg) * numPhysicalIntRegs);
307 memset(floatRegFile, 0, sizeof(PhysFloatReg) * numPhysicalFloatRegs);