New directory structure:
[gem5.git] / src / cpu / o3 / rename_map.hh
1 /*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 // Todo: Create destructor.
30 // Have it so that there's a more meaningful name given to the variable
31 // that marks the beginning of the FP registers.
32
33 #ifndef __CPU_O3_CPU_RENAME_MAP_HH__
34 #define __CPU_O3_CPU_RENAME_MAP_HH__
35
36 #include <iostream>
37 #include <utility>
38 #include <vector>
39
40 #include "cpu/o3/free_list.hh"
41 //For RegIndex
42 #include "arch/isa_traits.hh"
43
44 class SimpleRenameMap
45 {
46 protected:
47 typedef TheISA::RegIndex RegIndex;
48 public:
49 /**
50 * Pair of a logical register and a physical register. Tells the
51 * previous mapping of a logical register to a physical register.
52 * Used to roll back the rename map to a previous state.
53 */
54 typedef std::pair<RegIndex, PhysRegIndex> UnmapInfo;
55
56 /**
57 * Pair of a physical register and a physical register. Used to
58 * return the physical register that a logical register has been
59 * renamed to, and the previous physical register that the same
60 * logical register was previously mapped to.
61 */
62 typedef std::pair<PhysRegIndex, PhysRegIndex> RenameInfo;
63
64 public:
65 //Constructor
66 SimpleRenameMap(unsigned _numLogicalIntRegs,
67 unsigned _numPhysicalIntRegs,
68 unsigned _numLogicalFloatRegs,
69 unsigned _numPhysicalFloatRegs,
70 unsigned _numMiscRegs,
71 RegIndex _intZeroReg,
72 RegIndex _floatZeroReg);
73
74 /** Destructor. */
75 ~SimpleRenameMap();
76
77 void setFreeList(SimpleFreeList *fl_ptr);
78
79 //Tell rename map to get a free physical register for a given
80 //architected register. Not sure it should have a return value,
81 //but perhaps it should have some sort of fault in case there are
82 //no free registers.
83 RenameInfo rename(RegIndex arch_reg);
84
85 PhysRegIndex lookup(RegIndex phys_reg);
86
87 bool isReady(PhysRegIndex arch_reg);
88
89 /**
90 * Marks the given register as ready, meaning that its value has been
91 * calculated and written to the register file.
92 * @param ready_reg The index of the physical register that is now ready.
93 */
94 void markAsReady(PhysRegIndex ready_reg);
95
96 void setEntry(RegIndex arch_reg, PhysRegIndex renamed_reg);
97
98 void squash(std::vector<RegIndex> freed_regs,
99 std::vector<UnmapInfo> unmaps);
100
101 int numFreeEntries();
102
103 private:
104 /** Number of logical integer registers. */
105 int numLogicalIntRegs;
106
107 /** Number of physical integer registers. */
108 int numPhysicalIntRegs;
109
110 /** Number of logical floating point registers. */
111 int numLogicalFloatRegs;
112
113 /** Number of physical floating point registers. */
114 int numPhysicalFloatRegs;
115
116 /** Number of miscellaneous registers. */
117 int numMiscRegs;
118
119 /** Number of logical integer + float registers. */
120 int numLogicalRegs;
121
122 /** Number of physical integer + float registers. */
123 int numPhysicalRegs;
124
125 /** The integer zero register. This implementation assumes it is always
126 * zero and never can be anything else.
127 */
128 RegIndex intZeroReg;
129
130 /** The floating point zero register. This implementation assumes it is
131 * always zero and never can be anything else.
132 */
133 RegIndex floatZeroReg;
134
135 class RenameEntry
136 {
137 public:
138 PhysRegIndex physical_reg;
139 bool valid;
140
141 RenameEntry()
142 : physical_reg(0), valid(false)
143 { }
144 };
145
146 /** Integer rename map. */
147 RenameEntry *intRenameMap;
148
149 /** Floating point rename map. */
150 RenameEntry *floatRenameMap;
151
152 /** Free list interface. */
153 SimpleFreeList *freeList;
154
155 // Might want to make all these scoreboards into one large scoreboard.
156
157 /** Scoreboard of physical integer registers, saying whether or not they
158 * are ready.
159 */
160 std::vector<bool> intScoreboard;
161
162 /** Scoreboard of physical floating registers, saying whether or not they
163 * are ready.
164 */
165 std::vector<bool> floatScoreboard;
166
167 /** Scoreboard of miscellaneous registers, saying whether or not they
168 * are ready.
169 */
170 std::vector<bool> miscScoreboard;
171 };
172
173 #endif //__CPU_O3_CPU_RENAME_MAP_HH__