2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 // Todo: Create destructor.
32 // Have it so that there's a more meaningful name given to the variable
33 // that marks the beginning of the FP registers.
35 #ifndef __CPU_O3_RENAME_MAP_HH__
36 #define __CPU_O3_RENAME_MAP_HH__
42 #include "cpu/o3/free_list.hh"
44 #include "arch/isa_traits.hh"
49 typedef TheISA::RegIndex RegIndex;
52 * Pair of a logical register and a physical register. Tells the
53 * previous mapping of a logical register to a physical register.
54 * Used to roll back the rename map to a previous state.
56 typedef std::pair<RegIndex, PhysRegIndex> UnmapInfo;
59 * Pair of a physical register and a physical register. Used to
60 * return the physical register that a logical register has been
61 * renamed to, and the previous physical register that the same
62 * logical register was previously mapped to.
64 typedef std::pair<PhysRegIndex, PhysRegIndex> RenameInfo;
67 /** Default constructor. init() must be called prior to use. */
73 /** Initializes rename map with given parameters. */
74 void init(unsigned _numLogicalIntRegs,
75 unsigned _numPhysicalIntRegs,
76 PhysRegIndex &_int_reg_start,
78 unsigned _numLogicalFloatRegs,
79 unsigned _numPhysicalFloatRegs,
80 PhysRegIndex &_float_reg_start,
82 unsigned _numMiscRegs,
85 RegIndex _floatZeroReg,
90 /** Sets the free list used with this rename map. */
91 void setFreeList(SimpleFreeList *fl_ptr);
93 //Tell rename map to get a free physical register for a given
94 //architected register. Not sure it should have a return value,
95 //but perhaps it should have some sort of fault in case there are
97 RenameInfo rename(RegIndex arch_reg);
99 PhysRegIndex lookup(RegIndex phys_reg);
102 * Marks the given register as ready, meaning that its value has been
103 * calculated and written to the register file.
104 * @param ready_reg The index of the physical register that is now ready.
106 void setEntry(RegIndex arch_reg, PhysRegIndex renamed_reg);
108 int numFreeEntries();
114 /** Number of logical integer registers. */
115 int numLogicalIntRegs;
117 /** Number of physical integer registers. */
118 int numPhysicalIntRegs;
120 /** Number of logical floating point registers. */
121 int numLogicalFloatRegs;
123 /** Number of physical floating point registers. */
124 int numPhysicalFloatRegs;
126 /** Number of miscellaneous registers. */
129 /** Number of logical integer + float registers. */
132 /** Number of physical integer + float registers. */
135 /** The integer zero register. This implementation assumes it is always
136 * zero and never can be anything else.
140 /** The floating point zero register. This implementation assumes it is
141 * always zero and never can be anything else.
143 RegIndex floatZeroReg;
148 PhysRegIndex physical_reg;
152 : physical_reg(0), valid(false)
157 /** Integer rename map. */
158 std::vector<RenameEntry> intRenameMap;
160 /** Floating point rename map. */
161 std::vector<RenameEntry> floatRenameMap;
164 /** Free list interface. */
165 SimpleFreeList *freeList;
168 #endif //__CPU_O3_RENAME_MAP_HH__