src/cpu/o3/rob.hh

   1 /*
   2  * Copyright (c) 2004-2006 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Kevin Lim
  29  *          Korey Sewell
  30  */
  31
  32 #ifndef __CPU_O3_ROB_HH__
  33 #define __CPU_O3_ROB_HH__
  34
  35 #include <string>
  36 #include <utility>
  37 #include <vector>
  38
  39 /**
  40  * ROB class.  The ROB is largely what drives squashing.
  41  */
  42 template <class Impl>
  43 class ROB
  44 {
  45   protected:
  46     typedef TheISA::RegIndex RegIndex;
  47   public:
  48     //Typedefs from the Impl.
  49     typedef typename Impl::O3CPU O3CPU;
  50     typedef typename Impl::DynInstPtr DynInstPtr;
  51
  52     typedef std::pair<RegIndex, PhysRegIndex> UnmapInfo;
  53     typedef typename std::list<DynInstPtr>::iterator InstIt;
  54
  55     /** Possible ROB statuses. */
  56     enum Status {
  57         Running,
  58         Idle,
  59         ROBSquashing
  60     };
  61
  62     /** SMT ROB Sharing Policy */
  63     enum ROBPolicy{
  64         Dynamic,
  65         Partitioned,
  66         Threshold
  67     };
  68
  69   private:
  70     /** Per-thread ROB status. */
  71     Status robStatus[Impl::MaxThreads];
  72
  73     /** ROB resource sharing policy for SMT mode. */
  74     ROBPolicy robPolicy;
  75
  76   public:
  77     /** ROB constructor.
  78      *  @param _numEntries      Number of entries in ROB.
  79      *  @param _squashWidth     Number of instructions that can be squashed in a
  80      *                          single cycle.
  81      *  @param _smtROBPolicy    ROB Partitioning Scheme for SMT.
  82      *  @param _smtROBThreshold Max Resources(by %) a thread can have in the ROB.
  83      *  @param _numThreads      The number of active threads.
  84      */
  85     ROB(O3CPU *_cpu, unsigned _numEntries, unsigned _squashWidth,
  86         std::string smtROBPolicy, unsigned _smtROBThreshold,
  87         unsigned _numThreads);
  88
  89     std::string name() const;
  90
  91     /** Sets pointer to the list of active threads.
  92      *  @param at_ptr Pointer to the list of active threads.
  93      */
  94     void setActiveThreads(std::list<unsigned>* at_ptr);
  95
  96     /** Switches out the ROB. */
  97     void switchOut();
  98
  99     /** Takes over another CPU's thread. */
 100     void takeOverFrom();
 101
 102     /** Function to insert an instruction into the ROB. Note that whatever
 103      *  calls this function must ensure that there is enough space within the
 104      *  ROB for the new instruction.
 105      *  @param inst The instruction being inserted into the ROB.
 106      */
 107     void insertInst(DynInstPtr &inst);
 108
 109     /** Returns pointer to the head instruction within the ROB.  There is
 110      *  no guarantee as to the return value if the ROB is empty.
 111      *  @retval Pointer to the DynInst that is at the head of the ROB.
 112      */
 113 //    DynInstPtr readHeadInst();
 114
 115     /** Returns a pointer to the head instruction of a specific thread within
 116      *  the ROB.
 117      *  @return Pointer to the DynInst that is at the head of the ROB.
 118      */
 119     DynInstPtr readHeadInst(unsigned tid);
 120
 121     /** Returns pointer to the tail instruction within the ROB.  There is
 122      *  no guarantee as to the return value if the ROB is empty.
 123      *  @retval Pointer to the DynInst that is at the tail of the ROB.
 124      */
 125 //    DynInstPtr readTailInst();
 126
 127     /** Returns a pointer to the tail instruction of a specific thread within
 128      *  the ROB.
 129      *  @return Pointer to the DynInst that is at the tail of the ROB.
 130      */
 131     DynInstPtr readTailInst(unsigned tid);
 132
 133     /** Retires the head instruction, removing it from the ROB. */
 134 //    void retireHead();
 135
 136     /** Retires the head instruction of a specific thread, removing it from the
 137      *  ROB.
 138      */
 139     void retireHead(unsigned tid);
 140
 141     /** Is the oldest instruction across all threads ready. */
 142 //    bool isHeadReady();
 143
 144     /** Is the oldest instruction across a particular thread ready. */
 145     bool isHeadReady(unsigned tid);
 146
 147     /** Is there any commitable head instruction across all threads ready. */
 148     bool canCommit();
 149
 150     /** Re-adjust ROB partitioning. */
 151     void resetEntries();
 152
 153     /** Number of entries needed For 'num_threads' amount of threads. */
 154     int entryAmount(int num_threads);
 155
 156     /** Returns the number of total free entries in the ROB. */
 157     unsigned numFreeEntries();
 158
 159     /** Returns the number of free entries in a specific ROB paritition. */
 160     unsigned numFreeEntries(unsigned tid);
 161
 162     /** Returns the maximum number of entries for a specific thread. */
 163     unsigned getMaxEntries(unsigned tid)
 164     { return maxEntries[tid]; }
 165
 166     /** Returns the number of entries being used by a specific thread. */
 167     unsigned getThreadEntries(unsigned tid)
 168     { return threadEntries[tid]; }
 169
 170     /** Returns if the ROB is full. */
 171     bool isFull()
 172     { return numInstsInROB == numEntries; }
 173
 174     /** Returns if a specific thread's partition is full. */
 175     bool isFull(unsigned tid)
 176     { return threadEntries[tid] == numEntries; }
 177
 178     /** Returns if the ROB is empty. */
 179     bool isEmpty()
 180     { return numInstsInROB == 0; }
 181
 182     /** Returns if a specific thread's partition is empty. */
 183     bool isEmpty(unsigned tid)
 184     { return threadEntries[tid] == 0; }
 185
 186     /** Executes the squash, marking squashed instructions. */
 187     void doSquash(unsigned tid);
 188
 189     /** Squashes all instructions younger than the given sequence number for
 190      *  the specific thread.
 191      */
 192     void squash(InstSeqNum squash_num, unsigned tid);
 193
 194     /** Updates the head instruction with the new oldest instruction. */
 195     void updateHead();
 196
 197     /** Updates the tail instruction with the new youngest instruction. */
 198     void updateTail();
 199
 200     /** Reads the PC of the oldest head instruction. */
 201 //    uint64_t readHeadPC();
 202
 203     /** Reads the PC of the head instruction of a specific thread. */
 204 //    uint64_t readHeadPC(unsigned tid);
 205
 206     /** Reads the next PC of the oldest head instruction. */
 207 //    uint64_t readHeadNextPC();
 208
 209     /** Reads the next PC of the head instruction of a specific thread. */
 210 //    uint64_t readHeadNextPC(unsigned tid);
 211
 212     /** Reads the sequence number of the oldest head instruction. */
 213 //    InstSeqNum readHeadSeqNum();
 214
 215     /** Reads the sequence number of the head instruction of a specific thread.
 216      */
 217 //    InstSeqNum readHeadSeqNum(unsigned tid);
 218
 219     /** Reads the PC of the youngest tail instruction. */
 220 //    uint64_t readTailPC();
 221
 222     /** Reads the PC of the tail instruction of a specific thread. */
 223 //    uint64_t readTailPC(unsigned tid);
 224
 225     /** Reads the sequence number of the youngest tail instruction. */
 226 //    InstSeqNum readTailSeqNum();
 227
 228     /** Reads the sequence number of tail instruction of a specific thread. */
 229 //    InstSeqNum readTailSeqNum(unsigned tid);
 230
 231     /** Checks if the ROB is still in the process of squashing instructions.
 232      *  @retval Whether or not the ROB is done squashing.
 233      */
 234     bool isDoneSquashing(unsigned tid) const
 235     { return doneSquashing[tid]; }
 236
 237     /** Checks if the ROB is still in the process of squashing instructions for
 238      *  any thread.
 239      */
 240     bool isDoneSquashing();
 241
 242     /** This is more of a debugging function than anything.  Use
 243      *  numInstsInROB to get the instructions in the ROB unless you are
 244      *  double checking that variable.
 245      */
 246     int countInsts();
 247
 248     /** This is more of a debugging function than anything.  Use
 249      *  threadEntries to get the instructions in the ROB unless you are
 250      *  double checking that variable.
 251      */
 252     int countInsts(unsigned tid);
 253
 254   private:
 255     /** Pointer to the CPU. */
 256     O3CPU *cpu;
 257
 258     /** Active Threads in CPU */
 259     std::list<unsigned>* activeThreads;
 260
 261     /** Number of instructions in the ROB. */
 262     unsigned numEntries;
 263
 264     /** Entries Per Thread */
 265     unsigned threadEntries[Impl::MaxThreads];
 266
 267     /** Max Insts a Thread Can Have in the ROB */
 268     unsigned maxEntries[Impl::MaxThreads];
 269
 270     /** ROB List of Instructions */
 271     std::list<DynInstPtr> instList[Impl::MaxThreads];
 272
 273     /** Number of instructions that can be squashed in a single cycle. */
 274     unsigned squashWidth;
 275
 276   public:
 277     /** Iterator pointing to the instruction which is the last instruction
 278      *  in the ROB.  This may at times be invalid (ie when the ROB is empty),
 279      *  however it should never be incorrect.
 280      */
 281     InstIt tail;
 282
 283     /** Iterator pointing to the instruction which is the first instruction in
 284      *  in the ROB*/
 285     InstIt head;
 286
 287   private:
 288     /** Iterator used for walking through the list of instructions when
 289      *  squashing.  Used so that there is persistent state between cycles;
 290      *  when squashing, the instructions are marked as squashed but not
 291      *  immediately removed, meaning the tail iterator remains the same before
 292      *  and after a squash.
 293      *  This will always be set to cpu->instList.end() if it is invalid.
 294      */
 295     InstIt squashIt[Impl::MaxThreads];
 296
 297   public:
 298     /** Number of instructions in the ROB. */
 299     int numInstsInROB;
 300
 301     /** Dummy instruction returned if there are no insts left. */
 302     DynInstPtr dummyInst;
 303
 304   private:
 305     /** The sequence number of the squashed instruction. */
 306     InstSeqNum squashedSeqNum[Impl::MaxThreads];
 307
 308     /** Is the ROB done squashing. */
 309     bool doneSquashing[Impl::MaxThreads];
 310
 311     /** Number of active threads. */
 312     unsigned numThreads;
 313 };
 314
 315 #endif //__CPU_O3_ROB_HH__