Merge ktlim@zizzer:/bk/newmem
[gem5.git] / src / cpu / o3 / thread_state.hh
1 /*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #ifndef __CPU_O3_THREAD_STATE_HH__
30 #define __CPU_O3_THREAD_STATE_HH__
31
32 #include "arch/faults.hh"
33 #include "arch/isa_traits.hh"
34 #include "cpu/exec_context.hh"
35 #include "cpu/thread_state.hh"
36
37 class Event;
38 class Process;
39
40 #if FULL_SYSTEM
41 class EndQuiesceEvent;
42 class FunctionProfile;
43 class ProfileNode;
44 #else
45 class FunctionalMemory;
46 class Process;
47 #endif
48
49 /**
50 * Class that has various thread state, such as the status, the
51 * current instruction being processed, whether or not the thread has
52 * a trap pending or is being externally updated, the ExecContext
53 * proxy pointer, etc. It also handles anything related to a specific
54 * thread's process, such as syscalls and checking valid addresses.
55 */
56 template <class Impl>
57 struct O3ThreadState : public ThreadState {
58 typedef ExecContext::Status Status;
59 typedef typename Impl::FullCPU FullCPU;
60
61 Status _status;
62
63 // Current instruction
64 TheISA::MachInst inst;
65 private:
66 FullCPU *cpu;
67 public:
68
69 bool inSyscall;
70
71 bool trapPending;
72
73 #if FULL_SYSTEM
74 O3ThreadState(FullCPU *_cpu, int _thread_num, FunctionalMemory *_mem)
75 : ThreadState(-1, _thread_num, _mem),
76 inSyscall(0), trapPending(0)
77 { }
78 #else
79 O3ThreadState(FullCPU *_cpu, int _thread_num, Process *_process, int _asid)
80 : ThreadState(-1, _thread_num, NULL, _process, _asid),
81 cpu(_cpu), inSyscall(0), trapPending(0)
82 { }
83
84 O3ThreadState(FullCPU *_cpu, int _thread_num, FunctionalMemory *_mem,
85 int _asid)
86 : ThreadState(-1, _thread_num, _mem, NULL, _asid),
87 cpu(_cpu), inSyscall(0), trapPending(0)
88 { }
89 #endif
90
91 ExecContext *xcProxy;
92
93 ExecContext *getXCProxy() { return xcProxy; }
94
95 Status status() const { return _status; }
96
97 void setStatus(Status new_status) { _status = new_status; }
98
99 bool misspeculating() { return false; }
100
101 void setInst(TheISA::MachInst _inst) { inst = _inst; }
102
103 Counter readFuncExeInst() { return funcExeInst; }
104
105 void setFuncExeInst(Counter new_val) { funcExeInst = new_val; }
106
107 #if !FULL_SYSTEM
108 void syscall(int64_t callnum) { process->syscall(callnum, xcProxy); }
109 #endif
110 };
111
112 #endif // __CPU_O3_THREAD_STATE_HH__