A possible implementation of a multiplexed bus.
[gem5.git] / src / cpu / ozone / checker_builder.cc
1 /*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Kevin Lim
29 */
30
31 #include <string>
32
33 #include "cpu/checker/cpu_impl.hh"
34 #include "cpu/inst_seq.hh"
35 #include "cpu/ozone/dyn_inst.hh"
36 #include "cpu/ozone/ozone_impl.hh"
37 #include "sim/builder.hh"
38 #include "sim/process.hh"
39 #include "sim/sim_object.hh"
40
41 class MemObject;
42
43 template
44 class Checker<RefCountingPtr<OzoneDynInst<OzoneImpl> > >;
45
46 /**
47 * Specific non-templated derived class used for SimObject configuration.
48 */
49 class OzoneChecker :
50 public Checker<RefCountingPtr<OzoneDynInst<OzoneImpl> > >
51 {
52 public:
53 OzoneChecker(Params *p)
54 : Checker<RefCountingPtr<OzoneDynInst<OzoneImpl> > >(p)
55 { }
56 };
57
58 ////////////////////////////////////////////////////////////////////////
59 //
60 // CheckerCPU Simulation Object
61 //
62 BEGIN_DECLARE_SIM_OBJECT_PARAMS(OzoneChecker)
63
64 Param<Counter> max_insts_any_thread;
65 Param<Counter> max_insts_all_threads;
66 Param<Counter> max_loads_any_thread;
67 Param<Counter> max_loads_all_threads;
68 Param<Tick> progress_interval;
69
70 #if FULL_SYSTEM
71 SimObjectParam<AlphaITB *> itb;
72 SimObjectParam<AlphaDTB *> dtb;
73 SimObjectParam<System *> system;
74 Param<int> cpu_id;
75 Param<Tick> profile;
76 #else
77 SimObjectParam<Process *> workload;
78 #endif // FULL_SYSTEM
79 Param<int> clock;
80
81 Param<bool> defer_registration;
82 Param<bool> exitOnError;
83 Param<bool> updateOnError;
84 Param<bool> warnOnlyOnLoadError;
85 Param<bool> function_trace;
86 Param<Tick> function_trace_start;
87
88 END_DECLARE_SIM_OBJECT_PARAMS(OzoneChecker)
89
90 BEGIN_INIT_SIM_OBJECT_PARAMS(OzoneChecker)
91
92 INIT_PARAM(max_insts_any_thread,
93 "terminate when any thread reaches this inst count"),
94 INIT_PARAM(max_insts_all_threads,
95 "terminate when all threads have reached this inst count"),
96 INIT_PARAM(max_loads_any_thread,
97 "terminate when any thread reaches this load count"),
98 INIT_PARAM(max_loads_all_threads,
99 "terminate when all threads have reached this load count"),
100 INIT_PARAM_DFLT(progress_interval, "CPU Progress Interval", 0),
101
102 #if FULL_SYSTEM
103 INIT_PARAM(itb, "Instruction TLB"),
104 INIT_PARAM(dtb, "Data TLB"),
105 INIT_PARAM(system, "system object"),
106 INIT_PARAM(cpu_id, "processor ID"),
107 INIT_PARAM(profile, ""),
108 #else
109 INIT_PARAM(workload, "processes to run"),
110 #endif // FULL_SYSTEM
111
112 INIT_PARAM(clock, "clock speed"),
113
114 INIT_PARAM(defer_registration, "defer system registration (for sampling)"),
115 INIT_PARAM(exitOnError, "exit on error"),
116 INIT_PARAM(updateOnError, "Update the checker with the main CPU's state on error"),
117 INIT_PARAM_DFLT(warnOnlyOnLoadError, "warn, but don't exit, if a load "
118 "result errors", false),
119 INIT_PARAM(function_trace, "Enable function trace"),
120 INIT_PARAM(function_trace_start, "Cycle to start function trace")
121
122 END_INIT_SIM_OBJECT_PARAMS(OzoneChecker)
123
124
125 CREATE_SIM_OBJECT(OzoneChecker)
126 {
127 OzoneChecker::Params *params = new OzoneChecker::Params();
128 params->name = getInstanceName();
129 params->numberOfThreads = 1;
130 params->max_insts_any_thread = 0;
131 params->max_insts_all_threads = 0;
132 params->max_loads_any_thread = 0;
133 params->max_loads_all_threads = 0;
134 params->exitOnError = exitOnError;
135 params->updateOnError = updateOnError;
136 params->warnOnlyOnLoadError = warnOnlyOnLoadError;
137 params->deferRegistration = defer_registration;
138 params->functionTrace = function_trace;
139 params->functionTraceStart = function_trace_start;
140 params->clock = clock;
141 // Hack to touch all parameters. Consider not deriving Checker
142 // from BaseCPU..it's not really a CPU in the end.
143 Counter temp;
144 temp = max_insts_any_thread;
145 temp = max_insts_all_threads;
146 temp = max_loads_any_thread;
147 temp = max_loads_all_threads;
148 Tick temp2 = progress_interval;
149 temp2++;
150 params->progress_interval = 0;
151
152 #if FULL_SYSTEM
153 params->itb = itb;
154 params->dtb = dtb;
155 params->system = system;
156 params->cpu_id = cpu_id;
157 params->profile = profile;
158 #else
159 params->process = workload;
160 #endif
161
162 OzoneChecker *cpu = new OzoneChecker(params);
163 return cpu;
164 }
165
166 REGISTER_SIM_OBJECT("OzoneChecker", OzoneChecker)