X86: Add a .serializing directive that makes a macroop serializing.
[gem5.git] / src / cpu / ozone / cpu_builder.cc
1 /*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Kevin Lim
29 */
30
31 #include <string>
32
33 #include "cpu/checker/cpu.hh"
34 #include "cpu/inst_seq.hh"
35 #include "cpu/ozone/cpu.hh"
36 #include "cpu/ozone/ozone_impl.hh"
37 #include "cpu/ozone/simple_params.hh"
38 #include "params/DerivOzoneCPU.hh"
39 #include "sim/process.hh"
40 #include "sim/sim_object.hh"
41
42 class DerivOzoneCPU : public OzoneCPU<OzoneImpl>
43 {
44 public:
45 DerivOzoneCPU(SimpleParams *p)
46 : OzoneCPU<OzoneImpl>(p)
47 { }
48 };
49
50
51 ////////////////////////////////////////////////////////////////////////
52 //
53 // OzoneCPU Simulation Object
54 //
55 DerivOzoneCPU *
56 DerivOzoneCPUParams::create()
57 {
58 DerivOzoneCPU *cpu;
59
60 #if FULL_SYSTEM
61 // Full-system only supports a single thread for the moment.
62 ThreadID actual_num_threads = 1;
63 #else
64 // In non-full-system mode, we infer the number of threads from
65 // the workload if it's not explicitly specified.
66 ThreadID actual_num_threads =
67 numThreads.isValid() ? numThreads : workload.size();
68
69 if (workload.size() == 0) {
70 fatal("Must specify at least one workload!");
71 }
72
73 #endif
74
75 SimpleParams *params = new SimpleParams;
76
77 params->clock = clock;
78
79 params->name = name;
80 params->numberOfThreads = actual_num_threads;
81
82 params->itb = itb;
83 params->dtb = dtb;
84
85 params->system = system;
86 params->cpu_id = cpu_id;
87 #if FULL_SYSTEM
88 params->profile = profile;
89 params->do_quiesce = do_quiesce;
90 params->do_checkpoint_insts = do_checkpoint_insts;
91 params->do_statistics_insts = do_statistics_insts;
92 #else
93 params->workload = workload;
94 // params->pTable = page_table;
95 #endif // FULL_SYSTEM
96
97 params->checker = checker;
98 params->max_insts_any_thread = max_insts_any_thread;
99 params->max_insts_all_threads = max_insts_all_threads;
100 params->max_loads_any_thread = max_loads_any_thread;
101 params->max_loads_all_threads = max_loads_all_threads;
102 params->progress_interval = progress_interval;
103
104 //
105 // Caches
106 //
107 // params->icacheInterface = icache ? icache->getInterface() : NULL;
108 // params->dcacheInterface = dcache ? dcache->getInterface() : NULL;
109 params->cachePorts = cachePorts;
110
111 params->width = width;
112 params->frontEndWidth = frontEndWidth;
113 params->frontEndLatency = frontEndLatency;
114 params->backEndWidth = backEndWidth;
115 params->backEndSquashLatency = backEndSquashLatency;
116 params->backEndLatency = backEndLatency;
117 params->maxInstBufferSize = maxInstBufferSize;
118 params->numPhysicalRegs = numPhysIntRegs + numPhysFloatRegs;
119 params->maxOutstandingMemOps = maxOutstandingMemOps;
120
121 params->decodeToFetchDelay = decodeToFetchDelay;
122 params->renameToFetchDelay = renameToFetchDelay;
123 params->iewToFetchDelay = iewToFetchDelay;
124 params->commitToFetchDelay = commitToFetchDelay;
125 params->fetchWidth = fetchWidth;
126
127 params->renameToDecodeDelay = renameToDecodeDelay;
128 params->iewToDecodeDelay = iewToDecodeDelay;
129 params->commitToDecodeDelay = commitToDecodeDelay;
130 params->fetchToDecodeDelay = fetchToDecodeDelay;
131 params->decodeWidth = decodeWidth;
132
133 params->iewToRenameDelay = iewToRenameDelay;
134 params->commitToRenameDelay = commitToRenameDelay;
135 params->decodeToRenameDelay = decodeToRenameDelay;
136 params->renameWidth = renameWidth;
137
138 params->commitToIEWDelay = commitToIEWDelay;
139 params->renameToIEWDelay = renameToIEWDelay;
140 params->issueToExecuteDelay = issueToExecuteDelay;
141 params->issueWidth = issueWidth;
142 params->executeWidth = executeWidth;
143 params->executeIntWidth = executeIntWidth;
144 params->executeFloatWidth = executeFloatWidth;
145 params->executeBranchWidth = executeBranchWidth;
146 params->executeMemoryWidth = executeMemoryWidth;
147
148 params->iewToCommitDelay = iewToCommitDelay;
149 params->renameToROBDelay = renameToROBDelay;
150 params->commitWidth = commitWidth;
151 params->squashWidth = squashWidth;
152
153 params->predType = predType;
154 params->localPredictorSize = localPredictorSize;
155 params->localCtrBits = localCtrBits;
156 params->localHistoryTableSize = localHistoryTableSize;
157 params->localHistoryBits = localHistoryBits;
158 params->globalPredictorSize = globalPredictorSize;
159 params->globalCtrBits = globalCtrBits;
160 params->globalHistoryBits = globalHistoryBits;
161 params->choicePredictorSize = choicePredictorSize;
162 params->choiceCtrBits = choiceCtrBits;
163
164 params->BTBEntries = BTBEntries;
165 params->BTBTagSize = BTBTagSize;
166
167 params->RASSize = RASSize;
168
169 params->LQEntries = LQEntries;
170 params->SQEntries = SQEntries;
171 params->lsqLimits = lsqLimits;
172
173 params->SSITSize = SSITSize;
174 params->LFSTSize = LFSTSize;
175
176 params->numPhysIntRegs = numPhysIntRegs;
177 params->numPhysFloatRegs = numPhysFloatRegs;
178 params->numIQEntries = numIQEntries;
179 params->numROBEntries = numROBEntries;
180
181 params->decoupledFrontEnd = decoupledFrontEnd;
182 params->dispatchWidth = dispatchWidth;
183 params->wbWidth = wbWidth;
184
185 params->smtNumFetchingThreads = smtNumFetchingThreads;
186 params->smtFetchPolicy = smtFetchPolicy;
187 params->smtIQPolicy = smtIQPolicy;
188 params->smtLSQPolicy = smtLSQPolicy;
189 params->smtLSQThreshold = smtLSQThreshold;
190 params->smtROBPolicy = smtROBPolicy;
191 params->smtROBThreshold = smtROBThreshold;
192 params->smtCommitPolicy = smtCommitPolicy;
193
194 params->instShiftAmt = 2;
195
196 params->deferRegistration = defer_registration;
197
198 params->functionTrace = function_trace;
199 params->functionTraceStart = function_trace_start;
200
201 cpu = new DerivOzoneCPU(params);
202
203 return cpu;
204 }