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29 #ifndef __CPU_OZONE_DYN_INST_HH__
30 #define __CPU_OZONE_DYN_INST_HH__
32 #include "arch/isa_traits.hh"
33 #include "config/full_system.hh"
34 #include "cpu/base_dyn_inst.hh"
35 #include "cpu/ozone/cpu.hh" // MUST include this
36 #include "cpu/inst_seq.hh"
37 //#include "cpu/ozone/simple_impl.hh" // Would be nice to not have to include this
38 #include "cpu/ozone/ozone_impl.hh"
44 class OzoneDynInst : public BaseDynInst<Impl>
48 typedef typename Impl::FullCPU FullCPU;
50 typedef typename FullCPU::ImplState ImplState;
52 // Typedef for DynInstPtr. This is really just a RefCountingPtr<OoODynInst>.
53 typedef typename Impl::DynInstPtr DynInstPtr;
55 typedef TheISA::ExtMachInst ExtMachInst;
56 typedef TheISA::MachInst MachInst;
57 typedef TheISA::MiscReg MiscReg;
58 typedef typename std::list<DynInstPtr>::iterator ListIt;
60 // Note that this is duplicated from the BaseDynInst class; I'm
61 // simply not sure the enum would carry through so I could use it
62 // in array declarations in this class.
64 MaxInstSrcRegs = TheISA::MaxInstSrcRegs,
65 MaxInstDestRegs = TheISA::MaxInstDestRegs
68 OzoneDynInst(FullCPU *cpu);
70 OzoneDynInst(ExtMachInst inst, Addr PC, Addr Pred_PC,
71 InstSeqNum seq_num, FullCPU *cpu);
73 OzoneDynInst(StaticInstPtr inst);
77 void setSrcInst(DynInstPtr &newSrcInst, int regIdx)
78 { srcInsts[regIdx] = newSrcInst; }
80 bool srcInstReady(int regIdx);
82 void setPrevDestInst(DynInstPtr &oldDestInst, int regIdx)
83 { prevDestInst[regIdx] = oldDestInst; }
85 DynInstPtr &getPrevDestInst(int regIdx)
86 { return prevDestInst[regIdx]; }
88 void addDependent(DynInstPtr &dependent_inst);
90 std::vector<DynInstPtr> &getDependents() { return dependents; }
91 std::vector<DynInstPtr> &getMemDeps() { return memDependents; }
92 std::list<DynInstPtr> &getMemSrcs() { return srcMemInsts; }
94 void wakeDependents();
96 void wakeMemDependents();
98 void addMemDependent(DynInstPtr &inst) { memDependents.push_back(inst); }
100 void addSrcMemInst(DynInstPtr &inst) { srcMemInsts.push_back(inst); }
102 void markMemInstReady(OzoneDynInst<Impl> *inst);
104 // For now I will remove instructions from the list when they wake
105 // up. In the future, you only really need a counter.
106 bool memDepReady() { return srcMemInsts.empty(); }
111 std::vector<DynInstPtr> dependents;
113 std::vector<DynInstPtr> memDependents;
115 std::list<DynInstPtr> srcMemInsts;
117 /** The instruction that produces the value of the source
118 * registers. These may be NULL if the value has already been
119 * read from the source instruction.
121 DynInstPtr srcInsts[MaxInstSrcRegs];
124 * Previous rename instruction for this destination.
126 DynInstPtr prevDestInst[MaxInstSrcRegs];
134 // The register accessor methods provide the index of the
135 // instruction's operand (e.g., 0 or 1), not the architectural
136 // register index, to simplify the implementation of register
137 // renaming. We find the architectural register index by indexing
138 // into the instruction's own operand index table. Note that a
139 // raw pointer to the StaticInst is provided instead of a
140 // ref-counted StaticInstPtr to redice overhead. This is fine as
141 // long as these methods don't copy the pointer into any long-term
142 // storage (which is pretty hard to imagine they would have reason
145 uint64_t readIntReg(const StaticInst *si, int idx)
147 return srcInsts[idx]->readIntResult();
150 float readFloatRegSingle(const StaticInst *si, int idx)
152 return srcInsts[idx]->readFloatResult();
155 double readFloatRegDouble(const StaticInst *si, int idx)
157 return srcInsts[idx]->readDoubleResult();
160 uint64_t readFloatRegInt(const StaticInst *si, int idx)
162 return srcInsts[idx]->readIntResult();
165 /** @todo: Make results into arrays so they can handle multiple dest
168 void setIntReg(const StaticInst *si, int idx, uint64_t val)
170 BaseDynInst<Impl>::setIntReg(si, idx, val);
173 void setFloatRegSingle(const StaticInst *si, int idx, float val)
175 BaseDynInst<Impl>::setFloatRegSingle(si, idx, val);
178 void setFloatRegDouble(const StaticInst *si, int idx, double val)
180 BaseDynInst<Impl>::setFloatRegDouble(si, idx, val);
183 void setFloatRegInt(const StaticInst *si, int idx, uint64_t val)
185 BaseDynInst<Impl>::setFloatRegInt(si, idx, val);
188 void setIntResult(uint64_t result) { this->instResult.integer = result; }
189 void setDoubleResult(double result) { this->instResult.dbl = result; }
196 Fault executeEAComp()
199 Fault executeMemAcc()
200 { return this->staticInst->memAccInst()->execute(this, this->traceData); }
202 void clearDependents();
204 void clearMemDependents();
208 MiscReg readMiscReg(int misc_reg);
210 MiscReg readMiscRegWithEffect(int misc_reg, Fault &fault);
212 Fault setMiscReg(int misc_reg, const MiscReg &val);
214 Fault setMiscRegWithEffect(int misc_reg, const MiscReg &val);
219 void setIntrFlag(int val);
221 void trap(Fault fault);
222 bool simPalCheck(int palFunc);
231 #endif // __CPU_OZONE_DYN_INST_HH__