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31 #include "arch/faults.hh"
32 #include "config/full_system.hh"
33 #include "cpu/ozone/dyn_inst.hh"
34 #include "kern/kernel_stats.hh"
37 OzoneDynInst<Impl>::OzoneDynInst(OzoneCPU *cpu)
38 : BaseDynInst<Impl>(0, 0, 0, 0, cpu)
40 this->setResultReady();
46 OzoneDynInst<Impl>::OzoneDynInst(ExtMachInst inst, Addr PC, Addr Pred_PC,
47 InstSeqNum seq_num, OzoneCPU *cpu)
48 : BaseDynInst<Impl>(inst, PC, Pred_PC, seq_num, cpu)
54 OzoneDynInst<Impl>::OzoneDynInst(StaticInstPtr _staticInst)
55 : BaseDynInst<Impl>(_staticInst)
61 OzoneDynInst<Impl>::~OzoneDynInst()
63 DPRINTF(BE, "[sn:%lli] destructor called\n", this->seqNum);
64 for (int i = 0; i < this->numSrcRegs(); ++i) {
68 for (int i = 0; i < this->numDestRegs(); ++i) {
69 prevDestInst[i] = NULL;
77 OzoneDynInst<Impl>::execute()
79 // @todo: Pretty convoluted way to avoid squashing from happening when using
80 // the XC during an instruction's execution (specifically for instructions
81 // that have sideeffects that use the XC). Fix this.
82 bool in_syscall = this->thread->inSyscall;
83 this->thread->inSyscall = true;
85 this->fault = this->staticInst->execute(this, this->traceData);
87 this->thread->inSyscall = in_syscall;
94 OzoneDynInst<Impl>::initiateAcc()
96 // @todo: Pretty convoluted way to avoid squashing from happening when using
97 // the XC during an instruction's execution (specifically for instructions
98 // that have sideeffects that use the XC). Fix this.
99 bool in_syscall = this->thread->inSyscall;
100 this->thread->inSyscall = true;
102 this->fault = this->staticInst->initiateAcc(this, this->traceData);
104 this->thread->inSyscall = in_syscall;
109 template <class Impl>
111 OzoneDynInst<Impl>::completeAcc(Packet *pkt)
113 this->fault = this->staticInst->completeAcc(pkt, this, this->traceData);
118 template <class Impl>
120 OzoneDynInst<Impl>::srcInstReady(int regIdx)
122 return srcInsts[regIdx]->isResultReady();
125 template <class Impl>
127 OzoneDynInst<Impl>::addDependent(DynInstPtr &dependent_inst)
129 dependents.push_back(dependent_inst);
132 template <class Impl>
134 OzoneDynInst<Impl>::wakeDependents()
136 for (int i = 0; i < dependents.size(); ++i) {
137 dependents[i]->markSrcRegReady();
141 template <class Impl>
143 OzoneDynInst<Impl>::wakeMemDependents()
145 for (int i = 0; i < memDependents.size(); ++i) {
146 memDependents[i]->markMemInstReady(this);
150 template <class Impl>
152 OzoneDynInst<Impl>::markMemInstReady(OzoneDynInst<Impl> *inst)
154 ListIt mem_it = srcMemInsts.begin();
155 while ((*mem_it) != inst && mem_it != srcMemInsts.end()) {
158 assert(mem_it != srcMemInsts.end());
160 srcMemInsts.erase(mem_it);
163 template <class Impl>
165 OzoneDynInst<Impl>::initInstPtrs()
167 for (int i = 0; i < MaxInstSrcRegs; ++i) {
173 template <class Impl>
175 OzoneDynInst<Impl>::srcsReady()
177 for (int i = 0; i < this->numSrcRegs(); ++i) {
178 if (!srcInsts[i]->isResultReady())
185 template <class Impl>
187 OzoneDynInst<Impl>::eaSrcsReady()
189 for (int i = 1; i < this->numSrcRegs(); ++i) {
190 if (!srcInsts[i]->isResultReady())
197 template <class Impl>
199 OzoneDynInst<Impl>::clearDependents()
202 for (int i = 0; i < this->numSrcRegs(); ++i) {
205 for (int i = 0; i < this->numDestRegs(); ++i) {
206 prevDestInst[i] = NULL;
210 template <class Impl>
212 OzoneDynInst<Impl>::clearMemDependents()
214 memDependents.clear();
217 template <class Impl>
219 OzoneDynInst<Impl>::readMiscReg(int misc_reg)
221 return this->thread->readMiscReg(misc_reg);
224 template <class Impl>
226 OzoneDynInst<Impl>::readMiscRegWithEffect(int misc_reg, Fault &fault)
228 return this->thread->readMiscRegWithEffect(misc_reg, fault);
231 template <class Impl>
233 OzoneDynInst<Impl>::setMiscReg(int misc_reg, const MiscReg &val)
235 this->setIntResult(val);
236 return this->thread->setMiscReg(misc_reg, val);
239 template <class Impl>
241 OzoneDynInst<Impl>::setMiscRegWithEffect(int misc_reg, const MiscReg &val)
243 return this->thread->setMiscRegWithEffect(misc_reg, val);
248 template <class Impl>
250 OzoneDynInst<Impl>::hwrei()
252 if (!this->cpu->inPalMode(this->readPC()))
253 return new AlphaISA::UnimplementedOpcodeFault;
255 this->setNextPC(this->thread->readMiscReg(AlphaISA::IPR_EXC_ADDR));
259 // FIXME: XXX check for interrupts? XXX
263 template <class Impl>
265 OzoneDynInst<Impl>::readIntrFlag()
267 return this->cpu->readIntrFlag();
270 template <class Impl>
272 OzoneDynInst<Impl>::setIntrFlag(int val)
274 this->cpu->setIntrFlag(val);
277 template <class Impl>
279 OzoneDynInst<Impl>::inPalMode()
281 return this->cpu->inPalMode();
284 template <class Impl>
286 OzoneDynInst<Impl>::trap(Fault fault)
288 fault->invoke(this->thread->getTC());
291 template <class Impl>
293 OzoneDynInst<Impl>::simPalCheck(int palFunc)
295 return this->cpu->simPalCheck(palFunc);
298 template <class Impl>
300 OzoneDynInst<Impl>::syscall(uint64_t &callnum)
302 this->cpu->syscall(callnum);