src/cpu/ozone/dyn_inst_impl.hh

   1 /*
   2  * Copyright (c) 2005-2006 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Kevin Lim
  29  */
  30
  31 #include "arch/faults.hh"
  32 #include "arch/isa_traits.hh"
  33 #include "config/full_system.hh"
  34 #include "cpu/ozone/dyn_inst.hh"
  35 #include "kern/kernel_stats.hh"
  36
  37 using namespace TheISA;
  38
  39 template <class Impl>
  40 OzoneDynInst<Impl>::OzoneDynInst(OzoneCPU *cpu)
  41     : BaseDynInst<Impl>(0, 0, 0, 0, cpu)
  42 {
  43     this->setResultReady();
  44
  45     initInstPtrs();
  46 }
  47
  48 template <class Impl>
  49 OzoneDynInst<Impl>::OzoneDynInst(ExtMachInst inst, Addr PC, Addr Pred_PC,
  50                                  InstSeqNum seq_num, OzoneCPU *cpu)
  51     : BaseDynInst<Impl>(inst, PC, Pred_PC, seq_num, cpu)
  52 {
  53     initInstPtrs();
  54 }
  55
  56 template <class Impl>
  57 OzoneDynInst<Impl>::OzoneDynInst(StaticInstPtr _staticInst)
  58     : BaseDynInst<Impl>(_staticInst)
  59 {
  60     initInstPtrs();
  61 }
  62
  63 template <class Impl>
  64 OzoneDynInst<Impl>::~OzoneDynInst()
  65 {
  66     DPRINTF(BE, "[sn:%lli] destructor called\n", this->seqNum);
  67     for (int i = 0; i < this->numSrcRegs(); ++i) {
  68         srcInsts[i] = NULL;
  69     }
  70
  71     for (int i = 0; i < this->numDestRegs(); ++i) {
  72         prevDestInst[i] = NULL;
  73     }
  74
  75     dependents.clear();
  76 }
  77
  78 template <class Impl>
  79 Fault
  80 OzoneDynInst<Impl>::execute()
  81 {
  82     // @todo: Pretty convoluted way to avoid squashing from happening when using
  83     // the XC during an instruction's execution (specifically for instructions
  84     // that have sideeffects that use the XC).  Fix this.
  85     bool in_syscall = this->thread->inSyscall;
  86     this->thread->inSyscall = true;
  87
  88     this->fault = this->staticInst->execute(this, this->traceData);
  89
  90     this->thread->inSyscall = in_syscall;
  91
  92     return this->fault;
  93 }
  94
  95 template <class Impl>
  96 Fault
  97 OzoneDynInst<Impl>::initiateAcc()
  98 {
  99     // @todo: Pretty convoluted way to avoid squashing from happening when using
 100     // the XC during an instruction's execution (specifically for instructions
 101     // that have sideeffects that use the XC).  Fix this.
 102     bool in_syscall = this->thread->inSyscall;
 103     this->thread->inSyscall = true;
 104
 105     this->fault = this->staticInst->initiateAcc(this, this->traceData);
 106
 107     this->thread->inSyscall = in_syscall;
 108
 109     return this->fault;
 110 }
 111
 112 template <class Impl>
 113 Fault
 114 OzoneDynInst<Impl>::completeAcc(Packet *pkt)
 115 {
 116     this->fault = this->staticInst->completeAcc(pkt, this, this->traceData);
 117
 118     return this->fault;
 119 }
 120
 121 template <class Impl>
 122 bool
 123 OzoneDynInst<Impl>::srcInstReady(int regIdx)
 124 {
 125     return srcInsts[regIdx]->isResultReady();
 126 }
 127
 128 template <class Impl>
 129 void
 130 OzoneDynInst<Impl>::addDependent(DynInstPtr &dependent_inst)
 131 {
 132     dependents.push_back(dependent_inst);
 133 }
 134
 135 template <class Impl>
 136 void
 137 OzoneDynInst<Impl>::wakeDependents()
 138 {
 139     for (int i = 0; i < dependents.size(); ++i) {
 140         dependents[i]->markSrcRegReady();
 141     }
 142 }
 143
 144 template <class Impl>
 145 void
 146 OzoneDynInst<Impl>::wakeMemDependents()
 147 {
 148     for (int i = 0; i < memDependents.size(); ++i) {
 149         memDependents[i]->markMemInstReady(this);
 150     }
 151 }
 152
 153 template <class Impl>
 154 void
 155 OzoneDynInst<Impl>::markMemInstReady(OzoneDynInst<Impl> *inst)
 156 {
 157     ListIt mem_it = srcMemInsts.begin();
 158     while ((*mem_it) != inst && mem_it != srcMemInsts.end()) {
 159         mem_it++;
 160     }
 161     assert(mem_it != srcMemInsts.end());
 162
 163     srcMemInsts.erase(mem_it);
 164 }
 165
 166 template <class Impl>
 167 void
 168 OzoneDynInst<Impl>::initInstPtrs()
 169 {
 170     for (int i = 0; i < MaxInstSrcRegs; ++i) {
 171         srcInsts[i] = NULL;
 172     }
 173     iqItValid = false;
 174 }
 175
 176 template <class Impl>
 177 bool
 178 OzoneDynInst<Impl>::srcsReady()
 179 {
 180     for (int i = 0; i < this->numSrcRegs(); ++i) {
 181         if (!srcInsts[i]->isResultReady())
 182             return false;
 183     }
 184
 185     return true;
 186 }
 187
 188 template <class Impl>
 189 bool
 190 OzoneDynInst<Impl>::eaSrcsReady()
 191 {
 192     for (int i = 1; i < this->numSrcRegs(); ++i) {
 193         if (!srcInsts[i]->isResultReady())
 194             return false;
 195     }
 196
 197     return true;
 198 }
 199
 200 template <class Impl>
 201 void
 202 OzoneDynInst<Impl>::clearDependents()
 203 {
 204     dependents.clear();
 205     for (int i = 0; i < this->numSrcRegs(); ++i) {
 206         srcInsts[i] = NULL;
 207     }
 208     for (int i = 0; i < this->numDestRegs(); ++i) {
 209         prevDestInst[i] = NULL;
 210     }
 211 }
 212
 213 template <class Impl>
 214 void
 215 OzoneDynInst<Impl>::clearMemDependents()
 216 {
 217     memDependents.clear();
 218 }
 219
 220 template <class Impl>
 221 MiscReg
 222 OzoneDynInst<Impl>::readMiscReg(int misc_reg)
 223 {
 224     return this->thread->readMiscReg(misc_reg);
 225 }
 226
 227 template <class Impl>
 228 MiscReg
 229 OzoneDynInst<Impl>::readMiscRegWithEffect(int misc_reg, Fault &fault)
 230 {
 231     return this->thread->readMiscRegWithEffect(misc_reg, fault);
 232 }
 233
 234 template <class Impl>
 235 Fault
 236 OzoneDynInst<Impl>::setMiscReg(int misc_reg, const MiscReg &val)
 237 {
 238     this->setIntResult(val);
 239     return this->thread->setMiscReg(misc_reg, val);
 240 }
 241
 242 template <class Impl>
 243 Fault
 244 OzoneDynInst<Impl>::setMiscRegWithEffect(int misc_reg, const MiscReg &val)
 245 {
 246     return this->thread->setMiscRegWithEffect(misc_reg, val);
 247 }
 248
 249 #if FULL_SYSTEM
 250
 251 template <class Impl>
 252 Fault
 253 OzoneDynInst<Impl>::hwrei()
 254 {
 255     if (!this->cpu->inPalMode(this->readPC()))
 256         return new AlphaISA::UnimplementedOpcodeFault;
 257
 258     this->setNextPC(this->thread->readMiscReg(AlphaISA::IPR_EXC_ADDR));
 259
 260     this->cpu->hwrei();
 261
 262     // FIXME: XXX check for interrupts? XXX
 263     return NoFault;
 264 }
 265
 266 template <class Impl>
 267 int
 268 OzoneDynInst<Impl>::readIntrFlag()
 269 {
 270 return this->cpu->readIntrFlag();
 271 }
 272
 273 template <class Impl>
 274 void
 275 OzoneDynInst<Impl>::setIntrFlag(int val)
 276 {
 277     this->cpu->setIntrFlag(val);
 278 }
 279
 280 template <class Impl>
 281 bool
 282 OzoneDynInst<Impl>::inPalMode()
 283 {
 284     return this->cpu->inPalMode();
 285 }
 286
 287 template <class Impl>
 288 void
 289 OzoneDynInst<Impl>::trap(Fault fault)
 290 {
 291     fault->invoke(this->thread->getTC());
 292 }
 293
 294 template <class Impl>
 295 bool
 296 OzoneDynInst<Impl>::simPalCheck(int palFunc)
 297 {
 298     return this->cpu->simPalCheck(palFunc);
 299 }
 300 #else
 301 template <class Impl>
 302 void
 303 OzoneDynInst<Impl>::syscall(uint64_t &callnum)
 304 {
 305     this->cpu->syscall(callnum);
 306 }
 307 #endif