src/cpu/ozone/dyn_inst_impl.hh

   1 /*
   2  * Copyright (c) 2005-2006 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 #include "arch/faults.hh"
  30 #include "arch/isa_traits.hh"
  31 #include "config/full_system.hh"
  32 #include "cpu/ozone/dyn_inst.hh"
  33 #include "kern/kernel_stats.hh"
  34
  35 using namespace TheISA;
  36
  37 template <class Impl>
  38 OzoneDynInst<Impl>::OzoneDynInst(FullCPU *cpu)
  39     : BaseDynInst<Impl>(0, 0, 0, 0, cpu)
  40 {
  41     this->setResultReady();
  42
  43     initInstPtrs();
  44 }
  45
  46 template <class Impl>
  47 OzoneDynInst<Impl>::OzoneDynInst(ExtMachInst inst, Addr PC, Addr Pred_PC,
  48                                  InstSeqNum seq_num, FullCPU *cpu)
  49     : BaseDynInst<Impl>(inst, PC, Pred_PC, seq_num, cpu)
  50 {
  51     initInstPtrs();
  52 }
  53
  54 template <class Impl>
  55 OzoneDynInst<Impl>::OzoneDynInst(StaticInstPtr _staticInst)
  56     : BaseDynInst<Impl>(_staticInst)
  57 {
  58     initInstPtrs();
  59 }
  60
  61 template <class Impl>
  62 OzoneDynInst<Impl>::~OzoneDynInst()
  63 {
  64     DPRINTF(BE, "[sn:%lli] destructor called\n", this->seqNum);
  65     for (int i = 0; i < this->numSrcRegs(); ++i) {
  66         srcInsts[i] = NULL;
  67     }
  68
  69     for (int i = 0; i < this->numDestRegs(); ++i) {
  70         prevDestInst[i] = NULL;
  71     }
  72
  73     dependents.clear();
  74 }
  75
  76 template <class Impl>
  77 Fault
  78 OzoneDynInst<Impl>::execute()
  79 {
  80     // @todo: Pretty convoluted way to avoid squashing from happening when using
  81     // the XC during an instruction's execution (specifically for instructions
  82     // that have sideeffects that use the XC).  Fix this.
  83     bool in_syscall = this->thread->inSyscall;
  84     this->thread->inSyscall = true;
  85
  86     this->fault = this->staticInst->execute(this, this->traceData);
  87
  88     this->thread->inSyscall = in_syscall;
  89
  90     return this->fault;
  91 }
  92
  93 template <class Impl>
  94 Fault
  95 OzoneDynInst<Impl>::initiateAcc()
  96 {
  97     // @todo: Pretty convoluted way to avoid squashing from happening when using
  98     // the XC during an instruction's execution (specifically for instructions
  99     // that have sideeffects that use the XC).  Fix this.
 100     bool in_syscall = this->thread->inSyscall;
 101     this->thread->inSyscall = true;
 102
 103     this->fault = this->staticInst->initiateAcc(this, this->traceData);
 104
 105     this->thread->inSyscall = in_syscall;
 106
 107     return this->fault;
 108 }
 109
 110 template <class Impl>
 111 Fault
 112 OzoneDynInst<Impl>::completeAcc()
 113 {
 114     if (this->isLoad()) {
 115         this->fault = this->staticInst->completeAcc(this->req->data,
 116                                                     this,
 117                                                     this->traceData);
 118     } else if (this->isStore()) {
 119         this->fault = this->staticInst->completeAcc((uint8_t*)&this->req->result,
 120                                                     this,
 121                                                     this->traceData);
 122     } else {
 123         panic("Unknown type!");
 124     }
 125
 126     return this->fault;
 127 }
 128
 129 template <class Impl>
 130 bool
 131 OzoneDynInst<Impl>::srcInstReady(int regIdx)
 132 {
 133     return srcInsts[regIdx]->isResultReady();
 134 }
 135
 136 template <class Impl>
 137 void
 138 OzoneDynInst<Impl>::addDependent(DynInstPtr &dependent_inst)
 139 {
 140     dependents.push_back(dependent_inst);
 141 }
 142
 143 template <class Impl>
 144 void
 145 OzoneDynInst<Impl>::wakeDependents()
 146 {
 147     for (int i = 0; i < dependents.size(); ++i) {
 148         dependents[i]->markSrcRegReady();
 149     }
 150 }
 151
 152 template <class Impl>
 153 void
 154 OzoneDynInst<Impl>::wakeMemDependents()
 155 {
 156     for (int i = 0; i < memDependents.size(); ++i) {
 157         memDependents[i]->markMemInstReady(this);
 158     }
 159 }
 160
 161 template <class Impl>
 162 void
 163 OzoneDynInst<Impl>::markMemInstReady(OzoneDynInst<Impl> *inst)
 164 {
 165     ListIt mem_it = srcMemInsts.begin();
 166     while ((*mem_it) != inst && mem_it != srcMemInsts.end()) {
 167         mem_it++;
 168     }
 169     assert(mem_it != srcMemInsts.end());
 170
 171     srcMemInsts.erase(mem_it);
 172 }
 173
 174 template <class Impl>
 175 void
 176 OzoneDynInst<Impl>::initInstPtrs()
 177 {
 178     for (int i = 0; i < MaxInstSrcRegs; ++i) {
 179         srcInsts[i] = NULL;
 180     }
 181     iqItValid = false;
 182 }
 183
 184 template <class Impl>
 185 bool
 186 OzoneDynInst<Impl>::srcsReady()
 187 {
 188     for (int i = 0; i < this->numSrcRegs(); ++i) {
 189         if (!srcInsts[i]->isResultReady())
 190             return false;
 191     }
 192
 193     return true;
 194 }
 195
 196 template <class Impl>
 197 bool
 198 OzoneDynInst<Impl>::eaSrcsReady()
 199 {
 200     for (int i = 1; i < this->numSrcRegs(); ++i) {
 201         if (!srcInsts[i]->isResultReady())
 202             return false;
 203     }
 204
 205     return true;
 206 }
 207
 208 template <class Impl>
 209 void
 210 OzoneDynInst<Impl>::clearDependents()
 211 {
 212     dependents.clear();
 213     for (int i = 0; i < this->numSrcRegs(); ++i) {
 214         srcInsts[i] = NULL;
 215     }
 216     for (int i = 0; i < this->numDestRegs(); ++i) {
 217         prevDestInst[i] = NULL;
 218     }
 219 }
 220
 221 template <class Impl>
 222 void
 223 OzoneDynInst<Impl>::clearMemDependents()
 224 {
 225     memDependents.clear();
 226 }
 227
 228 template <class Impl>
 229 MiscReg
 230 OzoneDynInst<Impl>::readMiscReg(int misc_reg)
 231 {
 232     return this->thread->readMiscReg(misc_reg);
 233 }
 234
 235 template <class Impl>
 236 MiscReg
 237 OzoneDynInst<Impl>::readMiscRegWithEffect(int misc_reg, Fault &fault)
 238 {
 239     return this->thread->readMiscRegWithEffect(misc_reg, fault);
 240 }
 241
 242 template <class Impl>
 243 Fault
 244 OzoneDynInst<Impl>::setMiscReg(int misc_reg, const MiscReg &val)
 245 {
 246     this->setIntResult(val);
 247     return this->thread->setMiscReg(misc_reg, val);
 248 }
 249
 250 template <class Impl>
 251 Fault
 252 OzoneDynInst<Impl>::setMiscRegWithEffect(int misc_reg, const MiscReg &val)
 253 {
 254     return this->thread->setMiscRegWithEffect(misc_reg, val);
 255 }
 256
 257 #if FULL_SYSTEM
 258
 259 template <class Impl>
 260 Fault
 261 OzoneDynInst<Impl>::hwrei()
 262 {
 263     if (!this->cpu->inPalMode(this->readPC()))
 264         return new AlphaISA::UnimplementedOpcodeFault;
 265
 266     this->setNextPC(this->thread->readMiscReg(AlphaISA::IPR_EXC_ADDR));
 267
 268     this->cpu->hwrei();
 269
 270     // FIXME: XXX check for interrupts? XXX
 271     return NoFault;
 272 }
 273
 274 template <class Impl>
 275 int
 276 OzoneDynInst<Impl>::readIntrFlag()
 277 {
 278 return this->cpu->readIntrFlag();
 279 }
 280
 281 template <class Impl>
 282 void
 283 OzoneDynInst<Impl>::setIntrFlag(int val)
 284 {
 285     this->cpu->setIntrFlag(val);
 286 }
 287
 288 template <class Impl>
 289 bool
 290 OzoneDynInst<Impl>::inPalMode()
 291 {
 292     return this->cpu->inPalMode();
 293 }
 294
 295 template <class Impl>
 296 void
 297 OzoneDynInst<Impl>::trap(Fault fault)
 298 {
 299     fault->invoke(this->thread->getXCProxy());
 300 }
 301
 302 template <class Impl>
 303 bool
 304 OzoneDynInst<Impl>::simPalCheck(int palFunc)
 305 {
 306     return this->cpu->simPalCheck(palFunc);
 307 }
 308 #else
 309 template <class Impl>
 310 void
 311 OzoneDynInst<Impl>::syscall()
 312 {
 313     this->cpu->syscall();
 314 }
 315 #endif