src/cpu/ozone/simple_cpu_builder.cc

   1 /*
   2  * Copyright (c) 2006 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Kevin Lim
  29  */
  30
  31 #include <string>
  32
  33 #include "cpu/checker/cpu.hh"
  34 #include "cpu/ozone/cpu_impl.hh"
  35 #include "cpu/ozone/simple_impl.hh"
  36 #include "cpu/ozone/simple_params.hh"
  37 #include "cpu/inst_seq.hh"
  38 #include "mem/cache/base.hh"
  39 #include "sim/SimpleOzoneCPU.hh"
  40 #include "sim/process.hh"
  41 #include "sim/sim_object.hh"
  42
  43 template
  44 class OzoneCPU<SimpleImpl>;
  45
  46 class SimpleOzoneCPU : public OzoneCPU<SimpleImpl>
  47 {
  48   public:
  49     SimpleOzoneCPU(SimpleParams *p)
  50         : OzoneCPU<SimpleImpl>(p)
  51     { }
  52 };
  53
  54 ////////////////////////////////////////////////////////////////////////
  55 //
  56 //  OzoneCPU Simulation Object
  57 //
  58 SimpleOzoneCPU *
  59 SimpleOzoneCPUParams::create()
  60 {
  61     SimpleOzoneCPU *cpu;
  62
  63     if (FullSystem) {
  64         // Full-system only supports a single thread for the moment.
  65         ThreadID actual_num_threads = 1;
  66     } else {
  67         // In non-full-system mode, we infer the number of threads from
  68         // the workload if it's not explicitly specified.
  69         ThreadID actual_num_threads =
  70             numThreads.isValid() ? numThreads : workload.size();
  71
  72         if (workload.size() == 0) {
  73             fatal("Must specify at least one workload!");
  74         }
  75     }
  76
  77     SimpleParams *params = new SimpleParams;
  78
  79     params->clock = clock;
  80
  81     params->name = name;
  82     params->numberOfThreads = actual_num_threads;
  83
  84     params->itb = itb;
  85     params->dtb = dtb;
  86     params->isa = isa;
  87
  88     params->system = system;
  89     params->cpu_id = cpu_id;
  90     params->workload = workload;
  91
  92     params->mem = mem;
  93     params->checker = checker;
  94     params->max_insts_any_thread = max_insts_any_thread;
  95     params->max_insts_all_threads = max_insts_all_threads;
  96     params->max_loads_any_thread = max_loads_any_thread;
  97     params->max_loads_all_threads = max_loads_all_threads;
  98
  99     //
 100     // Caches
 101     //
 102     params->icacheInterface = icache ? icache->getInterface() : NULL;
 103     params->dcacheInterface = dcache ? dcache->getInterface() : NULL;
 104     params->cachePorts = cachePorts;
 105
 106     params->width = width;
 107     params->frontEndWidth = frontEndWidth;
 108     params->backEndWidth = backEndWidth;
 109     params->backEndSquashLatency = backEndSquashLatency;
 110     params->backEndLatency = backEndLatency;
 111     params->maxInstBufferSize = maxInstBufferSize;
 112     params->numPhysicalRegs = numPhysIntRegs + numPhysFloatRegs;
 113
 114     params->decodeToFetchDelay = decodeToFetchDelay;
 115     params->renameToFetchDelay = renameToFetchDelay;
 116     params->iewToFetchDelay = iewToFetchDelay;
 117     params->commitToFetchDelay = commitToFetchDelay;
 118     params->fetchWidth = fetchWidth;
 119
 120     params->renameToDecodeDelay = renameToDecodeDelay;
 121     params->iewToDecodeDelay = iewToDecodeDelay;
 122     params->commitToDecodeDelay = commitToDecodeDelay;
 123     params->fetchToDecodeDelay = fetchToDecodeDelay;
 124     params->decodeWidth = decodeWidth;
 125
 126     params->iewToRenameDelay = iewToRenameDelay;
 127     params->commitToRenameDelay = commitToRenameDelay;
 128     params->decodeToRenameDelay = decodeToRenameDelay;
 129     params->renameWidth = renameWidth;
 130
 131     params->commitToIEWDelay = commitToIEWDelay;
 132     params->renameToIEWDelay = renameToIEWDelay;
 133     params->issueToExecuteDelay = issueToExecuteDelay;
 134     params->issueWidth = issueWidth;
 135     params->executeWidth = executeWidth;
 136     params->executeIntWidth = executeIntWidth;
 137     params->executeFloatWidth = executeFloatWidth;
 138     params->executeBranchWidth = executeBranchWidth;
 139     params->executeMemoryWidth = executeMemoryWidth;
 140
 141     params->iewToCommitDelay = iewToCommitDelay;
 142     params->renameToROBDelay = renameToROBDelay;
 143     params->commitWidth = commitWidth;
 144     params->squashWidth = squashWidth;
 145
 146     params->predType = predType;
 147     params->localPredictorSize = localPredictorSize;
 148     params->localCtrBits = localCtrBits;
 149     params->localHistoryTableSize = localHistoryTableSize;
 150     params->localHistoryBits = localHistoryBits;
 151     params->globalPredictorSize = globalPredictorSize;
 152     params->globalCtrBits = globalCtrBits;
 153     params->globalHistoryBits = globalHistoryBits;
 154     params->choicePredictorSize = choicePredictorSize;
 155     params->choiceCtrBits = choiceCtrBits;
 156
 157     params->BTBEntries = BTBEntries;
 158     params->BTBTagSize = BTBTagSize;
 159
 160     params->RASSize = RASSize;
 161
 162     params->LQEntries = LQEntries;
 163     params->SQEntries = SQEntries;
 164
 165     params->SSITSize = SSITSize;
 166     params->LFSTSize = LFSTSize;
 167
 168     params->numPhysIntRegs = numPhysIntRegs;
 169     params->numPhysFloatRegs = numPhysFloatRegs;
 170     params->numIQEntries = numIQEntries;
 171     params->numROBEntries = numROBEntries;
 172
 173     params->decoupledFrontEnd = decoupledFrontEnd;
 174     params->dispatchWidth = dispatchWidth;
 175     params->wbWidth = wbWidth;
 176
 177     params->smtNumFetchingThreads = smtNumFetchingThreads;
 178     params->smtFetchPolicy = smtFetchPolicy;
 179     params->smtIQPolicy    = smtIQPolicy;
 180     params->smtLSQPolicy    = smtLSQPolicy;
 181     params->smtLSQThreshold = smtLSQThreshold;
 182     params->smtROBPolicy   = smtROBPolicy;
 183     params->smtROBThreshold = smtROBThreshold;
 184     params->smtCommitPolicy = smtCommitPolicy;
 185
 186     params->instShiftAmt = 2;
 187
 188     params->switchedOut = switched_out;
 189
 190     params->functionTrace = function_trace;
 191     params->functionTraceStart = function_trace_start;
 192
 193     cpu = new SimpleOzoneCPU(params);
 194
 195     return cpu;
 196 }