inorder/alpha-isa: create eaComp object visible to StaticInst through ISA
[gem5.git] / src / cpu / ozone / simple_params.hh
1 /*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Kevin Lim
29 */
30
31 #ifndef __CPU_OZONE_SIMPLE_PARAMS_HH__
32 #define __CPU_OZONE_SIMPLE_PARAMS_HH__
33
34 #include "cpu/ozone/cpu.hh"
35
36 //Forward declarations
37 namespace TheISA
38 {
39 class TLB;
40 }
41 class FUPool;
42 class MemObject;
43 class PageTable;
44 class Process;
45 class System;
46
47 /**
48 * This file defines the parameters that will be used for the OzoneCPU.
49 * This must be defined externally so that the Impl can have a params class
50 * defined that it can pass to all of the individual stages.
51 */
52
53 class SimpleParams : public BaseCPU::Params
54 {
55 public:
56
57 TheISA::TLB *itb; TheISA::TLB *dtb;
58 #if !FULL_SYSTEM
59 std::vector<Process *> workload;
60 #endif // FULL_SYSTEM
61
62 //Page Table
63 PageTable *pTable;
64
65 //
66 // Caches
67 //
68 // MemInterface *icacheInterface;
69 // MemInterface *dcacheInterface;
70
71 unsigned cachePorts;
72 unsigned width;
73 unsigned frontEndLatency;
74 unsigned frontEndWidth;
75 unsigned backEndLatency;
76 unsigned backEndWidth;
77 unsigned backEndSquashLatency;
78 unsigned maxInstBufferSize;
79 unsigned numPhysicalRegs;
80 unsigned maxOutstandingMemOps;
81 //
82 // Fetch
83 //
84 unsigned decodeToFetchDelay;
85 unsigned renameToFetchDelay;
86 unsigned iewToFetchDelay;
87 unsigned commitToFetchDelay;
88 unsigned fetchWidth;
89
90 //
91 // Decode
92 //
93 unsigned renameToDecodeDelay;
94 unsigned iewToDecodeDelay;
95 unsigned commitToDecodeDelay;
96 unsigned fetchToDecodeDelay;
97 unsigned decodeWidth;
98
99 //
100 // Rename
101 //
102 unsigned iewToRenameDelay;
103 unsigned commitToRenameDelay;
104 unsigned decodeToRenameDelay;
105 unsigned renameWidth;
106
107 //
108 // IEW
109 //
110 unsigned commitToIEWDelay;
111 unsigned renameToIEWDelay;
112 unsigned issueToExecuteDelay;
113 unsigned issueWidth;
114 unsigned executeWidth;
115 unsigned executeIntWidth;
116 unsigned executeFloatWidth;
117 unsigned executeBranchWidth;
118 unsigned executeMemoryWidth;
119 FUPool *fuPool;
120
121 //
122 // Commit
123 //
124 unsigned iewToCommitDelay;
125 unsigned renameToROBDelay;
126 unsigned commitWidth;
127 unsigned squashWidth;
128
129 //
130 // Branch predictor (BP & BTB)
131 //
132 std::string predType;
133 unsigned localPredictorSize;
134 unsigned localCtrBits;
135 unsigned localHistoryTableSize;
136 unsigned localHistoryBits;
137 unsigned globalPredictorSize;
138 unsigned globalCtrBits;
139 unsigned globalHistoryBits;
140 unsigned choicePredictorSize;
141 unsigned choiceCtrBits;
142
143 unsigned BTBEntries;
144 unsigned BTBTagSize;
145
146 unsigned RASSize;
147
148 //
149 // Load store queue
150 //
151 unsigned LQEntries;
152 unsigned SQEntries;
153 bool lsqLimits;
154
155 //
156 // Memory dependence
157 //
158 unsigned SSITSize;
159 unsigned LFSTSize;
160
161 //
162 // Miscellaneous
163 //
164 unsigned numPhysIntRegs;
165 unsigned numPhysFloatRegs;
166 unsigned numIQEntries;
167 unsigned numROBEntries;
168
169 bool decoupledFrontEnd;
170 int dispatchWidth;
171 int wbWidth;
172
173 //SMT Parameters
174 unsigned smtNumFetchingThreads;
175
176 std::string smtFetchPolicy;
177
178 std::string smtIQPolicy;
179 unsigned smtIQThreshold;
180
181 std::string smtLSQPolicy;
182 unsigned smtLSQThreshold;
183
184 std::string smtCommitPolicy;
185
186 std::string smtROBPolicy;
187 unsigned smtROBThreshold;
188
189 // Probably can get this from somewhere.
190 unsigned instShiftAmt;
191 };
192
193 #endif // __CPU_OZONE_SIMPLE_PARAMS_HH__