src/cpu/ozone/thread_state.hh

   1 /*
   2  * Copyright (c) 2006 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Kevin Lim
  29  */
  30
  31 #ifndef __CPU_OZONE_THREAD_STATE_HH__
  32 #define __CPU_OZONE_THREAD_STATE_HH__
  33
  34 #include "arch/regfile.hh"
  35 #include "arch/types.hh"
  36 #include "base/callback.hh"
  37 #include "base/output.hh"
  38 #include "config/the_isa.hh"
  39 #include "cpu/thread_context.hh"
  40 #include "cpu/thread_state.hh"
  41 #include "sim/faults.hh"
  42 #include "sim/process.hh"
  43 #include "sim/sim_exit.hh"
  44
  45 class Event;
  46 //class Process;
  47
  48 class EndQuiesceEvent;
  49 class FunctionalMemory;
  50 class FunctionProfile;
  51 class Process;
  52 class ProfileNode;
  53
  54 // Maybe this ozone thread state should only really have committed state?
  55 // I need to think about why I'm using this and what it's useful for.  Clearly
  56 // has benefits for SMT; basically serves same use as SimpleThread.
  57 // Makes the ExecContext proxy easier.  Gives organization/central access point
  58 // to state of a thread that can be accessed normally (i.e. not in-flight
  59 // stuff within a OoO processor).  Does this need an TC proxy within it?
  60 template <class Impl>
  61 struct OzoneThreadState : public ThreadState {
  62     typedef typename ThreadContext::Status Status;
  63     typedef typename Impl::CPUType CPUType;
  64     typedef TheISA::MiscReg MiscReg;
  65
  66     OzoneThreadState(CPUType *_cpu, int _thread_num)
  67         : ThreadState(_cpu, -1, _thread_num),
  68           intrflag(0), cpu(_cpu), inSyscall(0), trapPending(0)
  69     {
  70         if (cpu->params->profile) {
  71             profile = new FunctionProfile(cpu->params->system->kernelSymtab);
  72             Callback *cb =
  73                 new MakeCallback<OzoneThreadState,
  74                 &OzoneThreadState::dumpFuncProfile>(this);
  75             registerExitCallback(cb);
  76         }
  77
  78         // let's fill with a dummy node for now so we don't get a segfault
  79         // on the first cycle when there's no node available.
  80         static ProfileNode dummyNode;
  81         profileNode = &dummyNode;
  82         profilePC = 3;
  83         miscRegFile.clear();
  84     }
  85
  86     OzoneThreadState(CPUType *_cpu, int _thread_num, Process *_process)
  87         : ThreadState(_cpu, -1, _thread_num, _process),
  88           cpu(_cpu), inSyscall(0), trapPending(0)
  89     {
  90         miscRegFile.clear();
  91     }
  92
  93     RenameTable<Impl> renameTable;
  94
  95     Addr PC;
  96
  97     Addr nextPC;
  98
  99     TheISA::MiscRegFile miscRegFile;
 100
 101     int intrflag;
 102
 103     typename Impl::CPUType *cpu;
 104
 105     bool inSyscall;
 106
 107     bool trapPending;
 108
 109     ThreadContext *tc;
 110
 111     ThreadContext *getTC() { return tc; }
 112
 113     MiscReg readMiscRegNoEffect(int misc_reg)
 114     {
 115         return miscRegFile.readRegNoEffect(misc_reg);
 116     }
 117
 118     MiscReg readMiscReg(int misc_reg)
 119     {
 120         return miscRegFile.readReg(misc_reg, tc);
 121     }
 122
 123     void setMiscRegNoEffect(int misc_reg, const MiscReg &val)
 124     {
 125         miscRegFile.setRegNoEffect(misc_reg, val);
 126     }
 127
 128     void setMiscReg(int misc_reg, const MiscReg &val)
 129     {
 130         miscRegFile.setReg(misc_reg, val, tc);
 131     }
 132
 133     uint64_t readPC()
 134     { return PC; }
 135
 136     void setPC(uint64_t val)
 137     { PC = val; }
 138
 139     uint64_t readNextPC()
 140     { return nextPC; }
 141
 142     void setNextPC(uint64_t val)
 143     { nextPC = val; }
 144
 145     void dumpFuncProfile()
 146     {
 147         std::ostream *os = simout.create(csprintf("profile.%s.dat", cpu->name()));
 148         profile->dump(tc, *os);
 149     }
 150 };
 151
 152 #endif // __CPU_OZONE_THREAD_STATE_HH__