cpu: o3: replace issueLatency with bool pipelined
[gem5.git] / src / cpu / pc_event.cc
1 /*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Nathan Binkert
29 * Steve Reinhardt
30 */
31
32 #include <algorithm>
33 #include <string>
34 #include <utility>
35
36 #include "base/debug.hh"
37 #include "base/trace.hh"
38 #include "cpu/base.hh"
39 #include "cpu/pc_event.hh"
40 #include "cpu/thread_context.hh"
41 #include "debug/PCEvent.hh"
42 #include "sim/core.hh"
43 #include "sim/system.hh"
44
45 using namespace std;
46
47 PCEventQueue::PCEventQueue()
48 {}
49
50 PCEventQueue::~PCEventQueue()
51 {}
52
53 bool
54 PCEventQueue::remove(PCEvent *event)
55 {
56 int removed = 0;
57 range_t range = equal_range(event);
58 iterator i = range.first;
59 while (i != range.second &&
60 i != pc_map.end()) {
61 if (*i == event) {
62 DPRINTF(PCEvent, "PC based event removed at %#x: %s\n",
63 event->pc(), event->descr());
64 i = pc_map.erase(i);
65 ++removed;
66 } else {
67 i++;
68 }
69
70 }
71
72 return removed > 0;
73 }
74
75 bool
76 PCEventQueue::schedule(PCEvent *event)
77 {
78 pc_map.push_back(event);
79 sort(pc_map.begin(), pc_map.end(), MapCompare());
80
81 DPRINTF(PCEvent, "PC based event scheduled for %#x: %s\n",
82 event->pc(), event->descr());
83
84 return true;
85 }
86
87 bool
88 PCEventQueue::doService(ThreadContext *tc)
89 {
90 // This will fail to break on Alpha PALcode addresses, but that is
91 // a rare use case.
92 Addr pc = tc->instAddr();
93 int serviced = 0;
94 range_t range = equal_range(pc);
95 for (iterator i = range.first; i != range.second; ++i) {
96 // Make sure that the pc wasn't changed as the side effect of
97 // another event. This for example, prevents two invocations
98 // of the SkipFuncEvent. Maybe we should have separate PC
99 // event queues for each processor?
100 if (pc != tc->instAddr())
101 continue;
102
103 DPRINTF(PCEvent, "PC based event serviced at %#x: %s\n",
104 (*i)->pc(), (*i)->descr());
105
106 (*i)->process(tc);
107 ++serviced;
108 }
109
110 return serviced > 0;
111 }
112
113 void
114 PCEventQueue::dump() const
115 {
116 const_iterator i = pc_map.begin();
117 const_iterator e = pc_map.end();
118
119 for (; i != e; ++i)
120 cprintf("%d: event at %#x: %s\n", curTick(), (*i)->pc(),
121 (*i)->descr());
122 }
123
124 PCEventQueue::range_t
125 PCEventQueue::equal_range(Addr pc)
126 {
127 return std::equal_range(pc_map.begin(), pc_map.end(), pc, MapCompare());
128 }
129
130 BreakPCEvent::BreakPCEvent(PCEventQueue *q, const std::string &desc, Addr addr,
131 bool del)
132 : PCEvent(q, desc, addr), remove(del)
133 {
134 }
135
136 void
137 BreakPCEvent::process(ThreadContext *tc)
138 {
139 StringWrap name(tc->getCpuPtr()->name() + ".break_event");
140 DPRINTFN("break event %s triggered\n", descr());
141 Debug::breakpoint();
142 if (remove)
143 delete this;
144 }
145
146 void
147 sched_break_pc_sys(System *sys, Addr addr)
148 {
149 new BreakPCEvent(&sys->pcEventQueue, "debug break", addr, true);
150 }
151
152 void
153 sched_break_pc(Addr addr)
154 {
155 for (vector<System *>::iterator sysi = System::systemList.begin();
156 sysi != System::systemList.end(); ++sysi) {
157 sched_break_pc_sys(*sysi, addr);
158 }
159
160 }
161
162 PanicPCEvent::PanicPCEvent(PCEventQueue *q, const std::string &desc, Addr pc)
163 : PCEvent(q, desc, pc)
164 {
165 }
166
167 void
168 PanicPCEvent::process(ThreadContext *tc)
169 {
170 StringWrap name(tc->getCpuPtr()->name() + ".panic_event");
171 panic(descr());
172 }