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4 * Copyright (c) 2012 Mark D. Hill and David A. Wood
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45 #include "cpu/pred/bpred_unit.hh"
49 #include "arch/isa_traits.hh"
50 #include "arch/types.hh"
51 #include "arch/utility.hh"
52 #include "base/trace.hh"
53 #include "config/the_isa.hh"
54 #include "debug/Branch.hh"
56 BPredUnit::BPredUnit(const Params
*params
)
58 numThreads(params
->numThreads
),
60 BTB(params
->BTBEntries
,
65 instShiftAmt(params
->instShiftAmt
)
68 r
.init(params
->RASSize
);
75 .name(name() + ".lookups")
76 .desc("Number of BP lookups")
80 .name(name() + ".condPredicted")
81 .desc("Number of conditional branches predicted")
85 .name(name() + ".condIncorrect")
86 .desc("Number of conditional branches incorrect")
90 .name(name() + ".BTBLookups")
91 .desc("Number of BTB lookups")
95 .name(name() + ".BTBHits")
96 .desc("Number of BTB hits")
100 .name(name() + ".BTBCorrect")
101 .desc("Number of correct BTB predictions (this stat may not "
106 .name(name() + ".BTBHitPct")
107 .desc("BTB Hit Percentage")
109 BTBHitPct
= (BTBHits
/ BTBLookups
) * 100;
112 .name(name() + ".usedRAS")
113 .desc("Number of times the RAS was used to get a target.")
117 .name(name() + ".RASInCorrect")
118 .desc("Number of incorrect RAS predictions.")
123 BPredUnit::pmuProbePoint(const char *name
)
125 ProbePoints::PMUUPtr ptr
;
126 ptr
.reset(new ProbePoints::PMU(getProbeManager(), name
));
132 BPredUnit::regProbePoints()
134 ppBranches
= pmuProbePoint("Branches");
135 ppMisses
= pmuProbePoint("Misses");
139 BPredUnit::drainSanityCheck() const
141 // We shouldn't have any outstanding requests when we resume from
143 for (const auto& ph M5_VAR_USED
: predHist
)
148 BPredUnit::predict(const StaticInstPtr
&inst
, const InstSeqNum
&seqNum
,
149 TheISA::PCState
&pc
, ThreadID tid
)
151 // See if branch predictor predicts taken.
152 // If so, get its target addr either from the BTB or the RAS.
153 // Save off record of branch stuff so the RAS can be fixed
154 // up once it's done.
156 bool pred_taken
= false;
157 TheISA::PCState target
= pc
;
160 ppBranches
->notify(1);
162 void *bp_history
= NULL
;
164 if (inst
->isUncondCtrl()) {
165 DPRINTF(Branch
, "[tid:%i]: Unconditional control.\n", tid
);
167 // Tell the BP there was an unconditional branch.
168 uncondBranch(pc
.instAddr(), bp_history
);
171 pred_taken
= lookup(pc
.instAddr(), bp_history
);
173 DPRINTF(Branch
, "[tid:%i]: [sn:%i] Branch predictor"
174 " predicted %i for PC %s\n", tid
, seqNum
, pred_taken
, pc
);
177 DPRINTF(Branch
, "[tid:%i]: [sn:%i] Creating prediction history "
178 "for PC %s\n", tid
, seqNum
, pc
);
180 PredictorHistory
predict_record(seqNum
, pc
.instAddr(),
181 pred_taken
, bp_history
, tid
);
183 // Now lookup in the BTB or RAS.
185 if (inst
->isReturn()) {
187 predict_record
.wasReturn
= true;
188 // If it's a function return call, then look up the address
190 TheISA::PCState rasTop
= RAS
[tid
].top();
191 target
= TheISA::buildRetPC(pc
, rasTop
);
193 // Record the top entry of the RAS, and its index.
194 predict_record
.usedRAS
= true;
195 predict_record
.RASIndex
= RAS
[tid
].topIdx();
196 predict_record
.RASTarget
= rasTop
;
200 DPRINTF(Branch
, "[tid:%i]: Instruction %s is a return, "
201 "RAS predicted target: %s, RAS index: %i.\n",
202 tid
, pc
, target
, predict_record
.RASIndex
);
206 if (inst
->isCall()) {
208 predict_record
.pushedRAS
= true;
210 // Record that it was a call so that the top RAS entry can
211 // be popped off if the speculation is incorrect.
212 predict_record
.wasCall
= true;
214 DPRINTF(Branch
, "[tid:%i]: Instruction %s was a "
215 "call, adding %s to the RAS index: %i.\n",
216 tid
, pc
, pc
, RAS
[tid
].topIdx());
219 if (BTB
.valid(pc
.instAddr(), tid
)) {
222 // If it's not a return, use the BTB to get the target addr.
223 target
= BTB
.lookup(pc
.instAddr(), tid
);
225 DPRINTF(Branch
, "[tid:%i]: Instruction %s predicted"
226 " target is %s.\n", tid
, pc
, target
);
229 DPRINTF(Branch
, "[tid:%i]: BTB doesn't have a "
230 "valid entry.\n",tid
);
232 // The Direction of the branch predictor is altered because the
233 // BTB did not have an entry
234 // The predictor needs to be updated accordingly
235 if (!inst
->isCall() && !inst
->isReturn()) {
236 btbUpdate(pc
.instAddr(), bp_history
);
237 DPRINTF(Branch
, "[tid:%i]:[sn:%i] btbUpdate"
238 " called for %s\n", tid
, seqNum
, pc
);
239 } else if (inst
->isCall() && !inst
->isUncondCtrl()) {
241 predict_record
.pushedRAS
= false;
243 TheISA::advancePC(target
, inst
);
247 if (inst
->isReturn()) {
248 predict_record
.wasReturn
= true;
250 TheISA::advancePC(target
, inst
);
255 predHist
[tid
].push_front(predict_record
);
257 DPRINTF(Branch
, "[tid:%i]: [sn:%i]: History entry added."
258 "predHist.size(): %i\n", tid
, seqNum
, predHist
[tid
].size());
264 BPredUnit::predictInOrder(const StaticInstPtr
&inst
, const InstSeqNum
&seqNum
,
265 int asid
, TheISA::PCState
&instPC
,
266 TheISA::PCState
&predPC
, ThreadID tid
)
268 // See if branch predictor predicts taken.
269 // If so, get its target addr either from the BTB or the RAS.
270 // Save off record of branch stuff so the RAS can be fixed
271 // up once it's done.
273 using TheISA::MachInst
;
275 bool pred_taken
= false;
276 TheISA::PCState target
;
279 ppBranches
->notify(1);
281 DPRINTF(Branch
, "[tid:%i] [sn:%i] %s ... PC %s doing branch "
282 "prediction\n", tid
, seqNum
,
283 inst
->disassemble(instPC
.instAddr()), instPC
);
285 void *bp_history
= NULL
;
287 if (inst
->isUncondCtrl()) {
288 DPRINTF(Branch
, "[tid:%i] Unconditional control.\n", tid
);
290 // Tell the BP there was an unconditional branch.
291 uncondBranch(instPC
.instAddr(), bp_history
);
293 if (inst
->isReturn() && RAS
[tid
].empty()) {
294 DPRINTF(Branch
, "[tid:%i] RAS is empty, predicting "
301 pred_taken
= lookup(predPC
.instAddr(), bp_history
);
304 PredictorHistory
predict_record(seqNum
, predPC
.instAddr(), pred_taken
,
307 // Now lookup in the BTB or RAS.
309 if (inst
->isReturn()) {
312 // If it's a function return call, then look up the address
314 TheISA::PCState rasTop
= RAS
[tid
].top();
315 target
= TheISA::buildRetPC(instPC
, rasTop
);
317 // Record the top entry of the RAS, and its index.
318 predict_record
.usedRAS
= true;
319 predict_record
.RASIndex
= RAS
[tid
].topIdx();
320 predict_record
.RASTarget
= rasTop
;
322 assert(predict_record
.RASIndex
< 16);
326 DPRINTF(Branch
, "[tid:%i]: Instruction %s is a return, "
327 "RAS predicted target: %s, RAS index: %i.\n",
329 predict_record
.RASIndex
);
333 if (inst
->isCall()) {
335 RAS
[tid
].push(instPC
);
336 predict_record
.pushedRAS
= true;
338 // Record that it was a call so that the top RAS entry can
339 // be popped off if the speculation is incorrect.
340 predict_record
.wasCall
= true;
342 DPRINTF(Branch
, "[tid:%i]: Instruction %s was a call"
343 ", adding %s to the RAS index: %i.\n",
348 if (inst
->isCall() &&
349 inst
->isUncondCtrl() &&
350 inst
->isDirectCtrl()) {
351 target
= inst
->branchTarget(instPC
);
352 } else if (BTB
.valid(predPC
.instAddr(), asid
)) {
355 // If it's not a return, use the BTB to get the target addr.
356 target
= BTB
.lookup(predPC
.instAddr(), asid
);
358 DPRINTF(Branch
, "[tid:%i]: [asid:%i] Instruction %s "
359 "predicted target is %s.\n",
360 tid
, asid
, instPC
, target
);
362 DPRINTF(Branch
, "[tid:%i]: BTB doesn't have a "
363 "valid entry, predicting false.\n",tid
);
370 // Set the PC and the instruction's predicted target.
373 DPRINTF(Branch
, "[tid:%i]: [sn:%i]: Setting Predicted PC to %s.\n",
374 tid
, seqNum
, predPC
);
376 predHist
[tid
].push_front(predict_record
);
378 DPRINTF(Branch
, "[tid:%i] [sn:%i] pushed onto front of predHist "
379 "...predHist.size(): %i\n",
380 tid
, seqNum
, predHist
[tid
].size());
386 BPredUnit::update(const InstSeqNum
&done_sn
, ThreadID tid
)
388 DPRINTF(Branch
, "[tid:%i]: Committing branches until "
389 "[sn:%lli].\n", tid
, done_sn
);
391 while (!predHist
[tid
].empty() &&
392 predHist
[tid
].back().seqNum
<= done_sn
) {
393 // Update the branch predictor with the correct results.
394 if (!predHist
[tid
].back().wasSquashed
) {
395 update(predHist
[tid
].back().pc
, predHist
[tid
].back().predTaken
,
396 predHist
[tid
].back().bpHistory
, false);
398 retireSquashed(predHist
[tid
].back().bpHistory
);
401 predHist
[tid
].pop_back();
406 BPredUnit::squash(const InstSeqNum
&squashed_sn
, ThreadID tid
)
408 History
&pred_hist
= predHist
[tid
];
410 while (!pred_hist
.empty() &&
411 pred_hist
.front().seqNum
> squashed_sn
) {
412 if (pred_hist
.front().usedRAS
) {
413 DPRINTF(Branch
, "[tid:%i]: Restoring top of RAS to: %i,"
414 " target: %s.\n", tid
,
415 pred_hist
.front().RASIndex
, pred_hist
.front().RASTarget
);
417 RAS
[tid
].restore(pred_hist
.front().RASIndex
,
418 pred_hist
.front().RASTarget
);
419 } else if (pred_hist
.front().wasCall
&& pred_hist
.front().pushedRAS
) {
420 // Was a call but predicated false. Pop RAS here
421 DPRINTF(Branch
, "[tid: %i] Squashing"
422 " Call [sn:%i] PC: %s Popping RAS\n", tid
,
423 pred_hist
.front().seqNum
, pred_hist
.front().pc
);
427 // This call should delete the bpHistory.
428 squash(pred_hist
.front().bpHistory
);
430 DPRINTF(Branch
, "[tid:%i]: Removing history for [sn:%i] "
431 "PC %s.\n", tid
, pred_hist
.front().seqNum
,
432 pred_hist
.front().pc
);
434 pred_hist
.pop_front();
436 DPRINTF(Branch
, "[tid:%i]: predHist.size(): %i\n",
437 tid
, predHist
[tid
].size());
442 BPredUnit::squash(const InstSeqNum
&squashed_sn
,
443 const TheISA::PCState
&corrTarget
,
444 bool actually_taken
, ThreadID tid
)
446 // Now that we know that a branch was mispredicted, we need to undo
447 // all the branches that have been seen up until this branch and
448 // fix up everything.
449 // NOTE: This should be call conceivably in 2 scenarios:
450 // (1) After an branch is executed, it updates its status in the ROB
451 // The commit stage then checks the ROB update and sends a signal to
452 // the fetch stage to squash history after the mispredict
453 // (2) In the decode stage, you can find out early if a unconditional
454 // PC-relative, branch was predicted incorrectly. If so, a signal
455 // to the fetch stage is sent to squash history after the mispredict
457 History
&pred_hist
= predHist
[tid
];
462 DPRINTF(Branch
, "[tid:%i]: Squashing from sequence number %i, "
463 "setting target to %s.\n", tid
, squashed_sn
, corrTarget
);
465 // Squash All Branches AFTER this mispredicted branch
466 squash(squashed_sn
, tid
);
468 // If there's a squash due to a syscall, there may not be an entry
469 // corresponding to the squash. In that case, don't bother trying to
471 if (!pred_hist
.empty()) {
473 auto hist_it
= pred_hist
.begin();
474 //HistoryIt hist_it = find(pred_hist.begin(), pred_hist.end(),
477 //assert(hist_it != pred_hist.end());
478 if (pred_hist
.front().seqNum
!= squashed_sn
) {
479 DPRINTF(Branch
, "Front sn %i != Squash sn %i\n",
480 pred_hist
.front().seqNum
, squashed_sn
);
482 assert(pred_hist
.front().seqNum
== squashed_sn
);
486 if ((*hist_it
).usedRAS
) {
490 update((*hist_it
).pc
, actually_taken
,
491 pred_hist
.front().bpHistory
, true);
492 hist_it
->wasSquashed
= true;
494 if (actually_taken
) {
495 if (hist_it
->wasReturn
&& !hist_it
->usedRAS
) {
496 DPRINTF(Branch
, "[tid: %i] Incorrectly predicted"
497 " return [sn:%i] PC: %s\n", tid
, hist_it
->seqNum
,
500 hist_it
->usedRAS
= true;
503 DPRINTF(Branch
,"[tid: %i] BTB Update called for [sn:%i]"
504 " PC: %s\n", tid
,hist_it
->seqNum
, hist_it
->pc
);
506 BTB
.update((*hist_it
).pc
, corrTarget
, tid
);
510 if (hist_it
->usedRAS
) {
511 DPRINTF(Branch
,"[tid: %i] Incorrectly predicted"
512 " return [sn:%i] PC: %s Restoring RAS\n", tid
,
513 hist_it
->seqNum
, hist_it
->pc
);
514 DPRINTF(Branch
, "[tid:%i]: Restoring top of RAS"
515 " to: %i, target: %s.\n", tid
,
516 hist_it
->RASIndex
, hist_it
->RASTarget
);
517 RAS
[tid
].restore(hist_it
->RASIndex
, hist_it
->RASTarget
);
518 hist_it
->usedRAS
= false;
519 } else if (hist_it
->wasCall
&& hist_it
->pushedRAS
) {
520 //Was a Call but predicated false. Pop RAS here
521 DPRINTF(Branch
, "[tid: %i] Incorrectly predicted"
522 " Call [sn:%i] PC: %s Popping RAS\n", tid
,
523 hist_it
->seqNum
, hist_it
->pc
);
525 hist_it
->pushedRAS
= false;
529 DPRINTF(Branch
, "[tid:%i]: [sn:%i] pred_hist empty, can't "
530 "update.\n", tid
, squashed_sn
);
538 for (const auto& ph
: predHist
) {
540 auto pred_hist_it
= ph
.begin();
542 cprintf("predHist[%i].size(): %i\n", i
++, ph
.size());
544 while (pred_hist_it
!= ph
.end()) {
545 cprintf("[sn:%lli], PC:%#x, tid:%i, predTaken:%i, "
547 pred_hist_it
->seqNum
, pred_hist_it
->pc
,
548 pred_hist_it
->tid
, pred_hist_it
->predTaken
,
549 pred_hist_it
->bpHistory
);