cpu: HTM Implementation for O3CPU
[gem5.git] / src / cpu / pred / ltage.cc
1 /*
2 * Copyright (c) 2014 The University of Wisconsin
3 *
4 * Copyright (c) 2006 INRIA (Institut National de Recherche en
5 * Informatique et en Automatique / French National Research Institute
6 * for Computer Science and Applied Mathematics)
7 *
8 * All rights reserved.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions are
12 * met: redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer;
14 * redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution;
17 * neither the name of the copyright holders nor the names of its
18 * contributors may be used to endorse or promote products derived from
19 * this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 /* @file
35 * Implementation of a L-TAGE branch predictor
36 */
37
38 #include "cpu/pred/ltage.hh"
39
40 #include "base/intmath.hh"
41 #include "base/logging.hh"
42 #include "base/random.hh"
43 #include "base/trace.hh"
44 #include "debug/Fetch.hh"
45 #include "debug/LTage.hh"
46
47 LTAGE::LTAGE(const LTAGEParams *params)
48 : TAGE(params), loopPredictor(params->loop_predictor)
49 {
50 }
51
52 void
53 LTAGE::init()
54 {
55 TAGE::init();
56 }
57
58 //prediction
59 bool
60 LTAGE::predict(ThreadID tid, Addr branch_pc, bool cond_branch, void* &b)
61 {
62 LTageBranchInfo *bi = new LTageBranchInfo(*tage, *loopPredictor);
63 b = (void*)(bi);
64
65 bool pred_taken = tage->tagePredict(tid, branch_pc, cond_branch,
66 bi->tageBranchInfo);
67
68 pred_taken = loopPredictor->loopPredict(tid, branch_pc, cond_branch,
69 bi->lpBranchInfo, pred_taken,
70 instShiftAmt);
71 if (cond_branch) {
72 if (bi->lpBranchInfo->loopPredUsed) {
73 bi->tageBranchInfo->provider = LOOP;
74 }
75 DPRINTF(LTage, "Predict for %lx: taken?:%d, loopTaken?:%d, "
76 "loopValid?:%d, loopUseCounter:%d, tagePred:%d, altPred:%d\n",
77 branch_pc, pred_taken, bi->lpBranchInfo->loopPred,
78 bi->lpBranchInfo->loopPredValid,
79 loopPredictor->getLoopUseCounter(),
80 bi->tageBranchInfo->tagePred, bi->tageBranchInfo->altTaken);
81 }
82
83 // record final prediction
84 bi->lpBranchInfo->predTaken = pred_taken;
85
86 return pred_taken;
87 }
88
89 // PREDICTOR UPDATE
90 void
91 LTAGE::update(ThreadID tid, Addr branch_pc, bool taken, void* bp_history,
92 bool squashed, const StaticInstPtr & inst, Addr corrTarget)
93 {
94 assert(bp_history);
95
96 LTageBranchInfo* bi = static_cast<LTageBranchInfo*>(bp_history);
97
98 if (squashed) {
99 if (tage->isSpeculativeUpdateEnabled()) {
100 // This restores the global history, then update it
101 // and recomputes the folded histories.
102 tage->squash(tid, taken, bi->tageBranchInfo, corrTarget);
103
104 if (bi->tageBranchInfo->condBranch) {
105 loopPredictor->squashLoop(bi->lpBranchInfo);
106 }
107 }
108 return;
109 }
110
111 int nrand = random_mt.random<int>() & 3;
112 if (bi->tageBranchInfo->condBranch) {
113 DPRINTF(LTage, "Updating tables for branch:%lx; taken?:%d\n",
114 branch_pc, taken);
115 tage->updateStats(taken, bi->tageBranchInfo);
116
117 loopPredictor->updateStats(taken, bi->lpBranchInfo);
118
119 loopPredictor->condBranchUpdate(tid, branch_pc, taken,
120 bi->tageBranchInfo->tagePred, bi->lpBranchInfo, instShiftAmt);
121
122 tage->condBranchUpdate(tid, branch_pc, taken, bi->tageBranchInfo,
123 nrand, corrTarget, bi->lpBranchInfo->predTaken);
124 }
125
126 tage->updateHistories(tid, branch_pc, taken, bi->tageBranchInfo, false,
127 inst, corrTarget);
128
129 delete bi;
130 }
131
132 void
133 LTAGE::squash(ThreadID tid, void *bp_history)
134 {
135 LTageBranchInfo* bi = (LTageBranchInfo*)(bp_history);
136
137 if (bi->tageBranchInfo->condBranch) {
138 loopPredictor->squash(tid, bi->lpBranchInfo);
139 }
140
141 TAGE::squash(tid, bp_history);
142 }
143
144 void
145 LTAGE::regStats()
146 {
147 TAGE::regStats();
148 }
149
150 LTAGE*
151 LTAGEParams::create()
152 {
153 return new LTAGE(this);
154 }