CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5
[gem5.git] / src / cpu / pred / ras.hh
1 /*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Kevin Lim
29 */
30
31 #ifndef __CPU_O3_RAS_HH__
32 #define __CPU_O3_RAS_HH__
33
34 #include <vector>
35
36 #include "arch/types.hh"
37 #include "base/types.hh"
38 #include "config/the_isa.hh"
39
40 /** Return address stack class, implements a simple RAS. */
41 class ReturnAddrStack
42 {
43 public:
44 /** Creates a return address stack, but init() must be called prior to
45 * use.
46 */
47 ReturnAddrStack() {}
48
49 /** Initializes RAS with a specified number of entries.
50 * @param numEntries Number of entries in the RAS.
51 */
52 void init(unsigned numEntries);
53
54 void reset();
55
56 /** Returns the top address on the RAS. */
57 TheISA::PCState top()
58 { return addrStack[tos]; }
59
60 /** Returns the index of the top of the RAS. */
61 unsigned topIdx()
62 { return tos; }
63
64 /** Pushes an address onto the RAS. */
65 void push(const TheISA::PCState &return_addr);
66
67 /** Pops the top address from the RAS. */
68 void pop();
69
70 /** Changes index to the top of the RAS, and replaces the top address with
71 * a new target.
72 * @param top_entry_idx The index of the RAS that will now be the top.
73 * @param restored The new target address of the new top of the RAS.
74 */
75 void restore(unsigned top_entry_idx, const TheISA::PCState &restored);
76
77 bool empty() { return usedEntries == 0; }
78
79 bool full() { return usedEntries == numEntries; }
80 private:
81 /** Increments the top of stack index. */
82 inline void incrTos()
83 { if (++tos == numEntries) tos = 0; }
84
85 /** Decrements the top of stack index. */
86 inline void decrTos()
87 { tos = (tos == 0 ? numEntries - 1 : tos - 1); }
88
89 /** The RAS itself. */
90 std::vector<TheISA::PCState> addrStack;
91
92 /** The number of entries in the RAS. */
93 unsigned numEntries;
94
95 /** The number of used entries in the RAS. */
96 unsigned usedEntries;
97
98 /** The top of stack index. */
99 unsigned tos;
100 };
101
102 #endif // __CPU_O3_RAS_HH__