2 * Copyright (c) 2014 The University of Wisconsin
4 * Copyright (c) 2006 INRIA (Institut National de Recherche en
5 * Informatique et en Automatique / French National Research Institute
6 * for Computer Science and Applied Mathematics)
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35 * Implementation of a TAGE branch predictor. TAGE is a global-history based
36 * branch predictor. It features a PC-indexed bimodal predictor and N
37 * partially tagged tables, indexed with a hash of the PC and the global
38 * branch history. The different lengths of global branch history used to
39 * index the partially tagged tables grow geometrically. A small path history
40 * is also used in the hash.
42 * All TAGE tables are accessed in parallel, and the one using the longest
43 * history that matches provides the prediction (some exceptions apply).
44 * Entries are allocated in components using a longer history than the
45 * one that predicted when the prediction is incorrect.
48 #ifndef __CPU_PRED_TAGE
49 #define __CPU_PRED_TAGE
53 #include "base/types.hh"
54 #include "cpu/pred/bpred_unit.hh"
55 #include "cpu/pred/tage_base.hh"
56 #include "params/TAGE.hh"
58 class TAGE: public BPredUnit
63 struct TageBranchInfo {
64 TAGEBase::BranchInfo *tageBranchInfo;
66 TageBranchInfo(TAGEBase &tage) : tageBranchInfo(tage.makeBranchInfo())
69 virtual ~TageBranchInfo()
71 delete tageBranchInfo;
75 virtual bool predict(ThreadID tid, Addr branch_pc, bool cond_branch,
80 TAGE(const TAGEParams *params);
82 // Base class methods.
83 void uncondBranch(ThreadID tid, Addr br_pc, void* &bp_history) override;
84 bool lookup(ThreadID tid, Addr branch_addr, void* &bp_history) override;
85 void btbUpdate(ThreadID tid, Addr branch_addr, void* &bp_history) override;
86 void update(ThreadID tid, Addr branch_addr, bool taken, void *bp_history,
87 bool squashed, const StaticInstPtr & inst,
88 Addr corrTarget = MaxAddr) override;
89 virtual void squash(ThreadID tid, void *bp_history) override;
92 #endif // __CPU_PRED_TAGE