src/cpu/reg_class.hh

   1 /*
   2  * Copyright (c) 2013 Advanced Micro Devices, Inc.
   3  * All rights reserved
   4  *.
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Steve Reinhardt
  29  */
  30
  31 #ifndef __CPU__REG_CLASS_HH__
  32 #define __CPU__REG_CLASS_HH__
  33
  34 #include <cassert>
  35 #include <cstddef>
  36
  37 #include "arch/registers.hh"
  38 #include "config/the_isa.hh"
  39
  40 /// Enumerate the classes of registers.
  41 enum RegClass {
  42     IntRegClass,        ///< Integer register
  43     FloatRegClass,      ///< Floating-point register
  44     CCRegClass,         ///< Condition-code register
  45     MiscRegClass        ///< Control (misc) register
  46 };
  47
  48 /// Number of register classes.  This value is not part of the enum,
  49 /// because putting it there makes the compiler complain about
  50 /// unhandled cases in some switch statements.
  51 const int NumRegClasses = MiscRegClass + 1;
  52
  53 /**
  54  * Map a 'unified' architectural register index to its register class.
  55  * The unified architectural register index space is used to represent
  56  * all architectural register identifiers in a single contiguous
  57  * index space.  See http://gem5.org/Register_Indexing.
  58  *
  59  * @param reg_idx Unified-space register index
  60  * @param rel_reg_idx Optional output param pointer; if non-NULL, location
  61  *        will be written with the relative register index for reg_idx
  62  *
  63  * @return Register class of reg_idx
  64  */
  65 inline
  66 RegClass regIdxToClass(TheISA::RegIndex reg_idx,
  67                        TheISA::RegIndex *rel_reg_idx = NULL)
  68 {
  69     assert(reg_idx < TheISA::Max_Reg_Index);
  70     RegClass cl;
  71     int offset;
  72
  73     if (reg_idx < TheISA::FP_Reg_Base) {
  74         cl = IntRegClass;
  75         offset = 0;
  76     } else if (reg_idx < TheISA::CC_Reg_Base) {
  77         cl = FloatRegClass;
  78         offset = TheISA::FP_Reg_Base;
  79     } else if (reg_idx < TheISA::Misc_Reg_Base) {
  80         // if there are no CC regs, the ISA should set
  81         // CC_Reg_Base == Misc_Reg_Base so the if above
  82         // never succeeds
  83         cl = CCRegClass;
  84         offset = TheISA::CC_Reg_Base;
  85     } else {
  86         cl = MiscRegClass;
  87         offset = TheISA::Misc_Reg_Base;
  88     }
  89
  90     if (rel_reg_idx)
  91         *rel_reg_idx = reg_idx - offset;
  92     return cl;
  93 }
  94
  95 /// Map enum values to strings for debugging
  96 extern const char *RegClassStrings[];
  97
  98
  99 #endif // __CPU__REG_CLASS_HH__