2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
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16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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28 * Authors: Steve Reinhardt
31 #ifndef __CPU_SIMPLE_ATOMIC_HH__
32 #define __CPU_SIMPLE_ATOMIC_HH__
34 #include "cpu/simple/base.hh"
36 class AtomicSimpleCPU : public BaseSimpleCPU
40 struct Params : public BaseSimpleCPU::Params {
45 AtomicSimpleCPU(Params *params);
46 virtual ~AtomicSimpleCPU();
61 Status status() const { return _status; }
65 struct TickEvent : public Event
69 TickEvent(AtomicSimpleCPU *c);
71 const char *description();
77 const bool simulate_stalls;
79 // main simulation loop (one cycle)
82 class CpuPort : public Port
89 CpuPort(const std::string &_name, AtomicSimpleCPU *_cpu)
90 : Port(_name), cpu(_cpu)
95 virtual bool recvTiming(Packet *pkt);
97 virtual Tick recvAtomic(Packet *pkt);
99 virtual void recvFunctional(Packet *pkt);
101 virtual void recvStatusChange(Status status);
103 virtual void recvRetry();
105 virtual void getDeviceAddressRanges(AddrRangeList &resp,
106 AddrRangeList &snoop)
107 { resp.clear(); snoop.clear(); }
115 Request *data_read_req;
116 Packet *data_read_pkt;
117 Request *data_write_req;
118 Packet *data_write_pkt;
125 virtual Port *getPort(const std::string &if_name, int idx = -1);
127 virtual void serialize(std::ostream &os);
128 virtual void unserialize(Checkpoint *cp, const std::string §ion);
129 virtual void resume();
132 void takeOverFrom(BaseCPU *oldCPU);
134 virtual void activateContext(int thread_num, int delay);
135 virtual void suspendContext(int thread_num);
138 Fault read(Addr addr, T &data, unsigned flags);
141 Fault write(T data, Addr addr, unsigned flags, uint64_t *res);
144 #endif // __CPU_SIMPLE_ATOMIC_HH__