2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
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28 * Authors: Steve Reinhardt
31 #ifndef __CPU_SIMPLE_ATOMIC_HH__
32 #define __CPU_SIMPLE_ATOMIC_HH__
34 #include "cpu/simple/base.hh"
35 #include "params/AtomicSimpleCPU.hh"
37 class AtomicSimpleCPU : public BaseSimpleCPU
41 AtomicSimpleCPU(AtomicSimpleCPUParams *params);
42 virtual ~AtomicSimpleCPU();
48 struct TickEvent : public Event
52 TickEvent(AtomicSimpleCPU *c);
54 const char *description() const;
61 const bool simulate_data_stalls;
62 const bool simulate_inst_stalls;
64 // main simulation loop (one cycle)
68 * An AtomicCPUPort overrides the default behaviour of the
69 * recvAtomic and ignores the packet instead of panicking.
71 class AtomicCPUPort : public CpuPort
76 AtomicCPUPort(const std::string &_name, BaseCPU* _cpu)
77 : CpuPort(_name, _cpu)
82 virtual Tick recvAtomic(PacketPtr pkt)
84 // Snooping a coherence request, just return
90 AtomicCPUPort icachePort;
91 AtomicCPUPort dcachePort;
96 Request data_read_req;
97 Request data_write_req;
102 Range<Addr> physMemAddr;
106 virtual Port *getPort(const std::string &if_name, int idx = -1);
108 virtual void serialize(std::ostream &os);
109 virtual void unserialize(Checkpoint *cp, const std::string §ion);
110 virtual void resume();
113 void takeOverFrom(BaseCPU *oldCPU);
115 virtual void activateContext(int thread_num, int delay);
116 virtual void suspendContext(int thread_num);
118 Fault readMem(Addr addr, uint8_t *data, unsigned size, unsigned flags);
120 Fault writeMem(uint8_t *data, unsigned size,
121 Addr addr, unsigned flags, uint64_t *res);
124 * Print state of address in memory system via PrintReq (for
127 void printAddr(Addr a);
130 #endif // __CPU_SIMPLE_ATOMIC_HH__