sim: Refactor quiesce and remove FS asserts
[gem5.git] / src / cpu / simple_thread.cc
1 /*
2 * Copyright (c) 2001-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Steve Reinhardt
29 * Nathan Binkert
30 * Lisa Hsu
31 * Kevin Lim
32 */
33
34 #include <string>
35
36 #include "arch/isa_traits.hh"
37 #include "arch/kernel_stats.hh"
38 #include "arch/stacktrace.hh"
39 #include "arch/utility.hh"
40 #include "base/callback.hh"
41 #include "base/cprintf.hh"
42 #include "base/output.hh"
43 #include "base/trace.hh"
44 #include "config/the_isa.hh"
45 #include "cpu/base.hh"
46 #include "cpu/profile.hh"
47 #include "cpu/quiesce_event.hh"
48 #include "cpu/simple_thread.hh"
49 #include "cpu/thread_context.hh"
50 #include "mem/fs_translating_port_proxy.hh"
51 #include "mem/se_translating_port_proxy.hh"
52 #include "params/BaseCPU.hh"
53 #include "sim/faults.hh"
54 #include "sim/full_system.hh"
55 #include "sim/process.hh"
56 #include "sim/serialize.hh"
57 #include "sim/sim_exit.hh"
58 #include "sim/system.hh"
59
60 using namespace std;
61
62 // constructor
63 SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys,
64 Process *_process, TheISA::TLB *_itb,
65 TheISA::TLB *_dtb, TheISA::ISA *_isa)
66 : ThreadState(_cpu, _thread_num, _process), isa(_isa),
67 predicate(false), system(_sys),
68 itb(_itb), dtb(_dtb)
69 {
70 clearArchRegs();
71 tc = new ProxyThreadContext<SimpleThread>(this);
72 quiesceEvent = new EndQuiesceEvent(tc);
73 }
74
75 SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys,
76 TheISA::TLB *_itb, TheISA::TLB *_dtb,
77 TheISA::ISA *_isa, bool use_kernel_stats)
78 : ThreadState(_cpu, _thread_num, NULL), isa(_isa), system(_sys), itb(_itb),
79 dtb(_dtb)
80 {
81 tc = new ProxyThreadContext<SimpleThread>(this);
82
83 quiesceEvent = new EndQuiesceEvent(tc);
84
85 clearArchRegs();
86
87 if (baseCpu->params()->profile) {
88 profile = new FunctionProfile(system->kernelSymtab);
89 Callback *cb =
90 new MakeCallback<SimpleThread,
91 &SimpleThread::dumpFuncProfile>(this);
92 registerExitCallback(cb);
93 }
94
95 // let's fill with a dummy node for now so we don't get a segfault
96 // on the first cycle when there's no node available.
97 static ProfileNode dummyNode;
98 profileNode = &dummyNode;
99 profilePC = 3;
100
101 if (use_kernel_stats)
102 kernelStats = new TheISA::Kernel::Statistics(system);
103 }
104
105 SimpleThread::~SimpleThread()
106 {
107 delete tc;
108 }
109
110 void
111 SimpleThread::takeOverFrom(ThreadContext *oldContext)
112 {
113 ::takeOverFrom(*tc, *oldContext);
114 decoder.takeOverFrom(oldContext->getDecoderPtr());
115
116 kernelStats = oldContext->getKernelStats();
117 funcExeInst = oldContext->readFuncExeInst();
118 storeCondFailures = 0;
119 }
120
121 void
122 SimpleThread::copyState(ThreadContext *oldContext)
123 {
124 // copy over functional state
125 _status = oldContext->status();
126 copyArchRegs(oldContext);
127 if (FullSystem)
128 funcExeInst = oldContext->readFuncExeInst();
129
130 _threadId = oldContext->threadId();
131 _contextId = oldContext->contextId();
132 }
133
134 void
135 SimpleThread::serialize(CheckpointOut &cp) const
136 {
137 ThreadState::serialize(cp);
138 ::serialize(*tc, cp);
139 }
140
141
142 void
143 SimpleThread::unserialize(CheckpointIn &cp)
144 {
145 ThreadState::unserialize(cp);
146 ::unserialize(*tc, cp);
147 }
148
149 void
150 SimpleThread::startup()
151 {
152 isa->startup(tc);
153 }
154
155 void
156 SimpleThread::dumpFuncProfile()
157 {
158 OutputStream *os(simout.create(csprintf("profile.%s.dat", baseCpu->name())));
159 profile->dump(tc, *os->stream());
160 simout.close(os);
161 }
162
163 void
164 SimpleThread::activate()
165 {
166 if (status() == ThreadContext::Active)
167 return;
168
169 lastActivate = curTick();
170 _status = ThreadContext::Active;
171 baseCpu->activateContext(_threadId);
172 }
173
174 void
175 SimpleThread::suspend()
176 {
177 if (status() == ThreadContext::Suspended)
178 return;
179
180 lastActivate = curTick();
181 lastSuspend = curTick();
182 _status = ThreadContext::Suspended;
183 baseCpu->suspendContext(_threadId);
184 }
185
186
187 void
188 SimpleThread::halt()
189 {
190 if (status() == ThreadContext::Halted)
191 return;
192
193 _status = ThreadContext::Halted;
194 baseCpu->haltContext(_threadId);
195 }
196
197
198 void
199 SimpleThread::regStats(const string &name)
200 {
201 if (FullSystem && kernelStats)
202 kernelStats->regStats(name + ".kern");
203 }
204
205 void
206 SimpleThread::copyArchRegs(ThreadContext *src_tc)
207 {
208 TheISA::copyRegs(src_tc, tc);
209 }
210
211 // The following methods are defined in src/arch/alpha/ev5.cc for
212 // Alpha.
213 #if THE_ISA != ALPHA_ISA
214 Fault
215 SimpleThread::hwrei()
216 {
217 return NoFault;
218 }
219
220 bool
221 SimpleThread::simPalCheck(int palFunc)
222 {
223 return true;
224 }
225 #endif