kvm, mem: Refactor some Event subclasses into lambdas
[gem5.git] / src / cpu / simple_thread.cc
1 /*
2 * Copyright (c) 2001-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Steve Reinhardt
29 * Nathan Binkert
30 * Lisa Hsu
31 * Kevin Lim
32 */
33
34 #include "cpu/simple_thread.hh"
35
36 #include <string>
37
38 #include "arch/isa_traits.hh"
39 #include "arch/kernel_stats.hh"
40 #include "arch/stacktrace.hh"
41 #include "arch/utility.hh"
42 #include "base/callback.hh"
43 #include "base/cprintf.hh"
44 #include "base/output.hh"
45 #include "base/trace.hh"
46 #include "config/the_isa.hh"
47 #include "cpu/base.hh"
48 #include "cpu/profile.hh"
49 #include "cpu/quiesce_event.hh"
50 #include "cpu/thread_context.hh"
51 #include "mem/fs_translating_port_proxy.hh"
52 #include "mem/se_translating_port_proxy.hh"
53 #include "params/BaseCPU.hh"
54 #include "sim/faults.hh"
55 #include "sim/full_system.hh"
56 #include "sim/process.hh"
57 #include "sim/serialize.hh"
58 #include "sim/sim_exit.hh"
59 #include "sim/system.hh"
60
61 using namespace std;
62
63 // constructor
64 SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys,
65 Process *_process, TheISA::TLB *_itb,
66 TheISA::TLB *_dtb, TheISA::ISA *_isa)
67 : ThreadState(_cpu, _thread_num, _process), isa(_isa),
68 predicate(false), system(_sys),
69 itb(_itb), dtb(_dtb)
70 {
71 clearArchRegs();
72 tc = new ProxyThreadContext<SimpleThread>(this);
73 quiesceEvent = new EndQuiesceEvent(tc);
74 }
75
76 SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys,
77 TheISA::TLB *_itb, TheISA::TLB *_dtb,
78 TheISA::ISA *_isa, bool use_kernel_stats)
79 : ThreadState(_cpu, _thread_num, NULL), isa(_isa), system(_sys), itb(_itb),
80 dtb(_dtb)
81 {
82 tc = new ProxyThreadContext<SimpleThread>(this);
83
84 quiesceEvent = new EndQuiesceEvent(tc);
85
86 clearArchRegs();
87
88 if (baseCpu->params()->profile) {
89 profile = new FunctionProfile(system->kernelSymtab);
90 Callback *cb =
91 new MakeCallback<SimpleThread,
92 &SimpleThread::dumpFuncProfile>(this);
93 registerExitCallback(cb);
94 }
95
96 // let's fill with a dummy node for now so we don't get a segfault
97 // on the first cycle when there's no node available.
98 static ProfileNode dummyNode;
99 profileNode = &dummyNode;
100 profilePC = 3;
101
102 if (use_kernel_stats)
103 kernelStats = new TheISA::Kernel::Statistics(system);
104 }
105
106 SimpleThread::~SimpleThread()
107 {
108 delete tc;
109 }
110
111 void
112 SimpleThread::takeOverFrom(ThreadContext *oldContext)
113 {
114 ::takeOverFrom(*tc, *oldContext);
115 decoder.takeOverFrom(oldContext->getDecoderPtr());
116
117 kernelStats = oldContext->getKernelStats();
118 funcExeInst = oldContext->readFuncExeInst();
119 storeCondFailures = 0;
120 }
121
122 void
123 SimpleThread::copyState(ThreadContext *oldContext)
124 {
125 // copy over functional state
126 _status = oldContext->status();
127 copyArchRegs(oldContext);
128 if (FullSystem)
129 funcExeInst = oldContext->readFuncExeInst();
130
131 _threadId = oldContext->threadId();
132 _contextId = oldContext->contextId();
133 }
134
135 void
136 SimpleThread::serialize(CheckpointOut &cp) const
137 {
138 ThreadState::serialize(cp);
139 ::serialize(*tc, cp);
140 }
141
142
143 void
144 SimpleThread::unserialize(CheckpointIn &cp)
145 {
146 ThreadState::unserialize(cp);
147 ::unserialize(*tc, cp);
148 }
149
150 void
151 SimpleThread::startup()
152 {
153 isa->startup(tc);
154 }
155
156 void
157 SimpleThread::dumpFuncProfile()
158 {
159 OutputStream *os(simout.create(csprintf("profile.%s.dat", baseCpu->name())));
160 profile->dump(tc, *os->stream());
161 simout.close(os);
162 }
163
164 void
165 SimpleThread::activate()
166 {
167 if (status() == ThreadContext::Active)
168 return;
169
170 lastActivate = curTick();
171 _status = ThreadContext::Active;
172 baseCpu->activateContext(_threadId);
173 }
174
175 void
176 SimpleThread::suspend()
177 {
178 if (status() == ThreadContext::Suspended)
179 return;
180
181 lastActivate = curTick();
182 lastSuspend = curTick();
183 _status = ThreadContext::Suspended;
184 baseCpu->suspendContext(_threadId);
185 }
186
187
188 void
189 SimpleThread::halt()
190 {
191 if (status() == ThreadContext::Halted)
192 return;
193
194 _status = ThreadContext::Halted;
195 baseCpu->haltContext(_threadId);
196 }
197
198
199 void
200 SimpleThread::regStats(const string &name)
201 {
202 if (FullSystem && kernelStats)
203 kernelStats->regStats(name + ".kern");
204 }
205
206 void
207 SimpleThread::copyArchRegs(ThreadContext *src_tc)
208 {
209 TheISA::copyRegs(src_tc, tc);
210 }
211
212 // The following methods are defined in src/arch/alpha/ev5.cc for
213 // Alpha.
214 #if THE_ISA != ALPHA_ISA
215 Fault
216 SimpleThread::hwrei()
217 {
218 return NoFault;
219 }
220
221 bool
222 SimpleThread::simPalCheck(int palFunc)
223 {
224 return true;
225 }
226 #endif