Various serialization changes to make it possible for the O3CPU to checkpoint.
[gem5.git] / src / cpu / simple_thread.cc
1 /*
2 * Copyright (c) 2001-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Steve Reinhardt
29 * Nathan Binkert
30 * Lisa Hsu
31 * Kevin Lim
32 */
33
34 #include <string>
35
36 #include "arch/isa_traits.hh"
37 #include "cpu/base.hh"
38 #include "cpu/simple_thread.hh"
39 #include "cpu/thread_context.hh"
40
41 #if FULL_SYSTEM
42 #include "base/callback.hh"
43 #include "base/cprintf.hh"
44 #include "base/output.hh"
45 #include "base/trace.hh"
46 #include "cpu/profile.hh"
47 #include "cpu/quiesce_event.hh"
48 #include "kern/kernel_stats.hh"
49 #include "sim/serialize.hh"
50 #include "sim/sim_exit.hh"
51 #include "arch/stacktrace.hh"
52 #else
53 #include "sim/process.hh"
54 #include "sim/system.hh"
55 #include "mem/translating_port.hh"
56 #endif
57
58 using namespace std;
59
60 // constructor
61 #if FULL_SYSTEM
62 SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys,
63 AlphaITB *_itb, AlphaDTB *_dtb,
64 bool use_kernel_stats)
65 : ThreadState(-1, _thread_num), cpu(_cpu), system(_sys), itb(_itb),
66 dtb(_dtb)
67
68 {
69 tc = new ProxyThreadContext<SimpleThread>(this);
70
71 quiesceEvent = new EndQuiesceEvent(tc);
72
73 regs.clear();
74
75 if (cpu->params->profile) {
76 profile = new FunctionProfile(system->kernelSymtab);
77 Callback *cb =
78 new MakeCallback<SimpleThread,
79 &SimpleThread::dumpFuncProfile>(this);
80 registerExitCallback(cb);
81 }
82
83 // let's fill with a dummy node for now so we don't get a segfault
84 // on the first cycle when there's no node available.
85 static ProfileNode dummyNode;
86 profileNode = &dummyNode;
87 profilePC = 3;
88
89 if (use_kernel_stats) {
90 kernelStats = new Kernel::Statistics(system);
91 } else {
92 kernelStats = NULL;
93 }
94 Port *mem_port;
95 physPort = new FunctionalPort(csprintf("%s-%d-funcport",
96 cpu->name(), tid));
97 mem_port = system->physmem->getPort("functional");
98 mem_port->setPeer(physPort);
99 physPort->setPeer(mem_port);
100
101 virtPort = new VirtualPort(csprintf("%s-%d-vport",
102 cpu->name(), tid));
103 mem_port = system->physmem->getPort("functional");
104 mem_port->setPeer(virtPort);
105 virtPort->setPeer(mem_port);
106 }
107 #else
108 SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num,
109 Process *_process, int _asid, MemObject* memobj)
110 : ThreadState(-1, _thread_num, _process, _asid, memobj),
111 cpu(_cpu)
112 {
113 /* Use this port to for syscall emulation writes to memory. */
114 Port *mem_port;
115 port = new TranslatingPort(csprintf("%s-%d-funcport",
116 cpu->name(), tid),
117 process->pTable, false);
118 mem_port = memobj->getPort("functional");
119 mem_port->setPeer(port);
120 port->setPeer(mem_port);
121
122 regs.clear();
123 tc = new ProxyThreadContext<SimpleThread>(this);
124 }
125
126 #endif
127
128 SimpleThread::SimpleThread(ThreadContext *oldContext)
129 #if FULL_SYSTEM
130 : ThreadState(-1, -1)
131 #else
132 : ThreadState(-1, -1, NULL, -1, NULL)
133 #endif
134 {
135 tc = new ProxyThreadContext<SimpleThread>(this);
136 regs.clear();
137
138 copyState(oldContext);
139
140 #if FULL_SYSTEM
141 EndQuiesceEvent *quiesce = oldContext->getQuiesceEvent();
142 if (quiesce) {
143 quiesceEvent = quiesce;
144 }
145 Kernel::Statistics *stats = oldContext->getKernelStats();
146 if (stats) {
147 kernelStats = stats;
148 }
149 #endif
150 }
151
152 SimpleThread::~SimpleThread()
153 {
154 delete tc;
155 }
156
157 void
158 SimpleThread::takeOverFrom(ThreadContext *oldContext)
159 {
160 // some things should already be set up
161 #if FULL_SYSTEM
162 assert(system == oldContext->getSystemPtr());
163 #else
164 assert(process == oldContext->getProcessPtr());
165 #endif
166
167 copyState(oldContext);
168 #if FULL_SYSTEM
169 EndQuiesceEvent *quiesce = oldContext->getQuiesceEvent();
170 if (quiesce) {
171 // Point the quiesce event's TC at this TC so that it wakes up
172 // the proper CPU.
173 quiesce->tc = tc;
174 }
175 if (quiesceEvent) {
176 quiesceEvent->tc = tc;
177 }
178 #endif
179
180 storeCondFailures = 0;
181
182 oldContext->setStatus(ThreadContext::Unallocated);
183 }
184
185 void
186 SimpleThread::copyState(ThreadContext *oldContext)
187 {
188 // copy over functional state
189 _status = oldContext->status();
190 copyArchRegs(oldContext);
191 cpuId = oldContext->readCpuId();
192 #if !FULL_SYSTEM
193 funcExeInst = oldContext->readFuncExeInst();
194 #endif
195 }
196
197 void
198 SimpleThread::serialize(ostream &os)
199 {
200 ThreadState::serialize(os);
201 regs.serialize(os);
202 // thread_num and cpu_id are deterministic from the config
203 }
204
205
206 void
207 SimpleThread::unserialize(Checkpoint *cp, const std::string &section)
208 {
209 ThreadState::unserialize(cp, section);
210 regs.unserialize(cp, section);
211 // thread_num and cpu_id are deterministic from the config
212 }
213
214 #if FULL_SYSTEM
215 void
216 SimpleThread::dumpFuncProfile()
217 {
218 std::ostream *os = simout.create(csprintf("profile.%s.dat", cpu->name()));
219 profile->dump(tc, *os);
220 }
221 #endif
222
223 void
224 SimpleThread::activate(int delay)
225 {
226 if (status() == ThreadContext::Active)
227 return;
228
229 lastActivate = curTick;
230
231 if (status() == ThreadContext::Unallocated) {
232 cpu->activateWhenReady(tid);
233 return;
234 }
235
236 _status = ThreadContext::Active;
237
238 // status() == Suspended
239 cpu->activateContext(tid, delay);
240 }
241
242 void
243 SimpleThread::suspend()
244 {
245 if (status() == ThreadContext::Suspended)
246 return;
247
248 lastActivate = curTick;
249 lastSuspend = curTick;
250 /*
251 #if FULL_SYSTEM
252 // Don't change the status from active if there are pending interrupts
253 if (cpu->check_interrupts()) {
254 assert(status() == ThreadContext::Active);
255 return;
256 }
257 #endif
258 */
259 _status = ThreadContext::Suspended;
260 cpu->suspendContext(tid);
261 }
262
263 void
264 SimpleThread::deallocate()
265 {
266 if (status() == ThreadContext::Unallocated)
267 return;
268
269 _status = ThreadContext::Unallocated;
270 cpu->deallocateContext(tid);
271 }
272
273 void
274 SimpleThread::halt()
275 {
276 if (status() == ThreadContext::Halted)
277 return;
278
279 _status = ThreadContext::Halted;
280 cpu->haltContext(tid);
281 }
282
283
284 void
285 SimpleThread::regStats(const string &name)
286 {
287 #if FULL_SYSTEM
288 if (kernelStats)
289 kernelStats->regStats(name + ".kern");
290 #endif
291 }
292
293 void
294 SimpleThread::copyArchRegs(ThreadContext *src_tc)
295 {
296 TheISA::copyRegs(src_tc, tc);
297 }
298
299 #if FULL_SYSTEM
300 VirtualPort*
301 SimpleThread::getVirtPort(ThreadContext *src_tc)
302 {
303 if (!src_tc)
304 return virtPort;
305
306 VirtualPort *vp;
307 Port *mem_port;
308
309 vp = new VirtualPort("tc-vport", src_tc);
310 mem_port = system->physmem->getPort("functional");
311 mem_port->setPeer(vp);
312 vp->setPeer(mem_port);
313 return vp;
314 }
315
316 void
317 SimpleThread::delVirtPort(VirtualPort *vp)
318 {
319 if (vp != virtPort) {
320 delete vp->getPeer();
321 delete vp;
322 }
323 }
324
325
326 #endif
327